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T15M1024A-100P Datasheet(PDF) 1 Page - Taiwan Memory Technology |
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T15M1024A-100P Datasheet(HTML) 1 Page - Taiwan Memory Technology |
1 / 13 page TE CH tm T15M1024A TM Technology Inc. reserves the right P. 1 Publication Date: FEB. 2002 to change products or specifications without notice. Revision:A SRAM 128K X 8 LOW POWER CMOS STATIC RAM FEATURES • Low-power consumption - Active: 40mA at 55ns - Stand-by: (CMOS input/output) 0 ~ +70 °C = 15uA -40 ~ +85 °C = 20uA • 55/70/100 ns access time • Equal access and cycle time • Single +5V (±10%) Power Supply • TTL compatible , Tri-state output • Common I/O capability • Automatic power-down when deselected • Available in 32-pin SOP ,TSOP-I(8x20mm), TSOP-I(8x13.4mm) and DIP (600 mil) package. PART NUMBER EXAMPLES PART NO. PACKAGE CODE Operating Temperature T15M1024A-55D T15M1024A-70H T15M1024A-100P T15M1024A-100N D=SOP H=TSOP-I(8x20) P=TSOP-I(8x13.4) N=DIP (600 mil) 0 ~ +70 °C T15M1024A-55DI T15M1024A-70HI T15M1024A-100PI T15M1024A-100NI D=SOP H=TSOP-I(8x20) P=TSOP-I(8x13.4) N=DIP (600 mil) -40 ~ +85 °C GENERAL DESCRIPTION The T15M1024A is a very Low Power CMOS Static RAM organized as 131,072 words by 8 bits. That operates on a wide voltage range from +5V ( ±10%) power supply, Fabricated using high performance CMOS technology, Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Data retention is guaranteed at a power supply voltage as low as 1.5V. BLOCK DIAGRAM DECODER A0 A16 I/O8 Vcc . . . ... DATA I/O CORE ARRAY Vss I/O1 WE OE CE1 CONTROL CIRCUIT CE2 |
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