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T4312816A-10S Datasheet(PDF) 8 Page - Taiwan Memory Technology |
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T4312816A-10S Datasheet(HTML) 8 Page - Taiwan Memory Technology |
8 / 29 page TE CH tm Preliminary T4312816A TM Technology Inc. reserves the right P.8 Publication Date: APR. 2003 to change products or specifications without notice. Revision: 0.B AC CHARACTERISTICS (AC opterating conditions unless otherwise noted) -6 -7 -7.5 -8 -10 Parameter Symbol Min Max Min Max Min Max Min Max Min Max Unit Note CAS Latency = 3 6 1K 7 1K 7.5 1K 8 1K 10 1K CLK cycle time CAS Latency = 2 tCC 8 9 9 10 10 ns 1 CAS Latency = 3 - 5.5 - 6 6 - 6 - 7 ns CLK to valid Output delay CAS Latency = 2 tSAC - 6 - 6 6 - 7 - 9 ns 1 Output data hold time tOH 2 2.5 2.5 2.5 2.5 ns 2 CLK high pulse width tCH 2 2.5 2.5 3 3 ns 3 CLK low pulse width tCL 2 2.5 2.5 3 3 ns 3 Input setup time tSS 1.5 1.75 1.75 2 2.5 ns 3 Input hold time tSH 1 1 1 1 1 ns 3 CLK to output in Low-Z tSLZ 1 1 1 1 1 ns 2 CAS Latency = 3 - 5.5 - 6 6 - 6 - 7 ns CLK to output in Hi-Z CAS Latency = 2 tSHZ - 6 - 6 6 - 7 - 9 ns Note: 1. Parameters depend on programmed CAS latency. 2. If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter. 3. Assumed input rise and fall time (tr & tf)=1ns. If tr & tf is longer than 1ns,transient time compensation should be considered, i.e.,[(tr+tf)/2-1]ns should be added to the parameter. |
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