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SPT9101SIC Datasheet(PDF) 3 Page - Cadeka Microcircuits LLC. |
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SPT9101SIC Datasheet(HTML) 3 Page - Cadeka Microcircuits LLC. |
3 / 8 page 3 12/30/99 SPT9101 ELECTRICAL SPECIFICATIONS +VS=+5.0 V, -VS=-5.2 V, RLOAD=100 Ω, unless otherwise specified. TEST TEST SPT9101 PARAMETERS CONDITIONS LEVEL MIN TYP MAX UNITS Hold Mode Dynamics Worst Harmonic 23 MHz, 50 MSPS V -75 dB FS VOut = 2 V p-p +25 °C Worst Harmonic 48 MHz, 100 MSPS IV -62 -57 dB FS VOut = 2 V p-p +25 °C Worst Harmonic 48 MHz, 100 MSPS IV -53 dB FS VOut = 2 V p-p Full Temp. Worst Harmonic 48 MHz, 125 MSPS V -57 dB FS VOut = 2 V p-p +25 °C Sampling Bandwidth2 -3 dB, +25 ˚C V 350 MHz VIN = 0.5 V p-p Hold Noise3 (RMS) +25 °C V 150 x tH mV/s Droop Rate VIN=0.0 V, +25 °C V -40 mV/ µs Feedthrough Rejection (50 MHz) Full Temp. V -66 dB VOut = 2 V p-p Maximum Hold Time, VIN=0 V Full Temp. IV 100 200 ns Track-and-Hold Switching Aperture Delay +25 °C V -250 ps Aperture Jitter +25 °C V <1 ps rms Pedestal Offset, VIN=0 V +25 °CI ±10 ±25 mV Full Temp. VI ±35 mV Transient Amplitude VIN = 0 V, Full Temp. V 8 mV Settling Time to 4 mV Full Temp. V 4 ns Glitch Product4 +25 °C V 20 pV-s VIN = 0 V Hold-to-Track Switching Acquisition Time to 0.1% +25 °CV 7 ns 2 V Output Step Acquisition Time to 0.01% +25 °CIV 11 14 ns 2 V Output Step Full Temp. IV 16 ns Power Supply5 +VS Voltage Full Temp, Track Mode VI 54 65 mA Full Temp, Clocked Mode VI 44 55 mA -VS Voltage Full Temp, Track Mode VI 54 65 mA Full Temp, Clocked Mode VI 44 55 mA Power Dissipation Full Temp, Track Mode VI 551 663 mW Full Temp, Clocked Mode VI 449 561 mW 1Time to recover within rated error band from 160% overdrive. 2Sampling bandwidth is defined as the -3 dB frequency response of the input sampler to the hold capacitor when operating in the sampling mode. It is greater than tracking bandwidth because it does not include the bandwidth of the output amplifier. 3Hold mode noise is proportional to the length of time a signal is held. For example, if the hold time (tH) is 20 ns, the accumulated noise is typically 3 µV (150 mV/s x 20 ns). This value must be combined with the track mode noise to obtain total noise. 4Total energy of worst case track-to-hold or hold-to-track glitch. Typical thermal impedances: ΘJC (LCC) = +6 °C/W ΘJA (SOIC) = +85 °C/W in still air at +25 °C ambient. 5Clocked mode is specified with a 50% clock duty cycle. 6Analog input voltage should be limited ≤0.8 volts to maintain device in linear range. |
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