Data Sheet P11510EJ3V0DS00

5

TEST CIRCUIT

50

Ω

IN

1

6

4

2, 3, 5

1 000 pF

1 000 pF

50

Ω

OUT

1 000 pF

EXAMPLE OF APPLICATION CIRCUIT

50

Ω

IN

1

6

4

2, 3, 5

1 000 pF

1 000 pF

1

6

4

2, 3, 5

1 000 pF

1 000 pF

50

Ω

OUT

1 000 pF

1 000 pF

50 to 200

Ω

To stabilize operation,

The application circuits and their parameters are for references only and are not intended for use in actual design-ins.

pins.

Coupling capacitors for input/output pins are intended to minimize RF serial impedance and cut DC.

To get flat gain from 100 MHz up, 1 000 pF capacitors are assembled on the test circuit. [Actually, 1 000 pF

capacitors give flat gain at least 10 MHz. In the case of under 10 MHz operation, increase the value of coupling

capacitor such as 2 200 pF. Because the coupling capacitors are determined by the equation of C = 1/(2

π fZs).]