Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.NET

X  

DS4402 Datasheet(PDF) 6 Page - Maxim Integrated Products

Part # DS4402
Description  Two/Four-Channel, I2C Adjustable Current DAC
Download  9 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

DS4402 Datasheet(HTML) 6 Page - Maxim Integrated Products

  DS4402 Datasheet HTML 1Page - Maxim Integrated Products DS4402 Datasheet HTML 2Page - Maxim Integrated Products DS4402 Datasheet HTML 3Page - Maxim Integrated Products DS4402 Datasheet HTML 4Page - Maxim Integrated Products DS4402 Datasheet HTML 5Page - Maxim Integrated Products DS4402 Datasheet HTML 6Page - Maxim Integrated Products DS4402 Datasheet HTML 7Page - Maxim Integrated Products DS4402 Datasheet HTML 8Page - Maxim Integrated Products DS4402 Datasheet HTML 9Page - Maxim Integrated Products  
Zoom Inzoom in Zoom Outzoom out
 6 / 9 page
background image
Memory Organization
To control the DS4402/DS4404’s current sources, write
to the memory addresses listed in Table 2.
The format of each output control register is given by:
Where:
Example: IFS0 = 800µA, and register F8h is written to a
value of 92h. Calculate the value of external resistance
required, and the magnitude of the output current with
this register setting.
RFS = (VREF / 800µA) x (31 / 4) = 11.9k
Ω
The MSB of the output register is 1, so the output is
sourcing the value corresponding to position 12h (18
decimal). The magnitude of the output current is equal to:
800µA x (18 / 31) = 465µA
I2C Serial Interface Description
I2C Definitions
The following terminology is commonly used to describe
I2C data transfers:
Master Device: The master device controls the slave
devices on the bus. The master device generates SCL
clock pulses, START and STOP conditions.
Slave Devices: Slave devices send and receive data
at the master’s request.
Bus Idle or Not Busy: Time between STOP and START
conditions when both SDA and SCL are inactive and in
their logic-high states. When the bus is idle it often initi-
ates a low-power mode for slave devices.
START Condition: A START condition is generated by
the master to initiate a new data transfer with a slave.
Transitioning SDA from high to low while SCL remains
high generates a START condition. See Figure 3 for
applicable timing.
STOP Condition: A STOP condition is generated by the
master to end a data transfer with a slave. Transitioning
SDA from low to high while SCL remains high generates
a STOP condition. See Figure 3 for applicable timing.
Repeated START Condition: The master can use a
repeated START condition at the end of one data trans-
fer to indicate that it will immediately initiate a new data
transfer following the current one. Repeated STARTs are
commonly used during read operations to identify a spe-
cific memory address to begin a data transfer. A repeat-
ed START condition is issued identically to a normal
START condition. See Figure 3 for applicable timing.
Bit Write: Transitions of SDA must occur during the low
state of SCL. The data on SDA must remain valid and
unchanged during the entire high pulse of SCL, plus the
setup and hold time requirements (Figure 3). Data is
shifted into the device during the rising edge of the SCL.
Bit Read: At the end of a write operation, the master
must release the SDA bus line for the proper amount of
setup time (Figure 3) before the next rising edge of SCL
during a bit read. The device shifts out each bit of data
on SDA at the falling edge of the previous SCL pulse
and the data bit is valid at the rising edge of the current
SCL pulse. Remember that the master generates all
SCL clock pulses, including when it is reading bits from
the slave.
Two/Four-Channel, I2C Adjustable Current DAC
6
______________________________________________________________________
MSB
LSB
SXX
D4
D3
D2
D1
D0
BIT
NAME
FUNCTION
POWER-ON
DEFAULT
S
Sign Bit
Determines if DAC sources
or sinks current. For sink
S = 0, for source S = 1.
0b
X
Reserved
Reserved. Both bits read
zero.
00b
DX
Data
5-Bit Data Word Controlling
DAC Output. Setting 00000b
outputs zero current
regardless of the state of the
sign bit.
00000b
Table 2. Memory Addresses
MEMORY ADDRESS
(HEXADECIMAL)
CURRENT SOURCE
F8h
OUT0
F9h
OUT1
FAh*
OUT2*
FBh*
OUT3*
*Only for DS4404.


Similar Part No. - DS4402

ManufacturerPart #DatasheetDescription
logo
Dallas Semiconductor
DS4402 DALLAS-DS4402 Datasheet
152Kb / 8P
   Two/Four-Channel, I2C Adjustable Current DAC
logo
Maxim Integrated Produc...
DS4402 MAXIM-DS4402 Datasheet
154Kb / 9P
   Two/Four-Channel, I2C Adjustable Current DAC
Rev 2; 10/08
DS4402 MAXIM-DS4402 Datasheet
693Kb / 10P
   Fully Assembled and Tested
Rev 0; 4/14
logo
Dallas Semiconductor
DS4402N DALLAS-DS4402N Datasheet
152Kb / 8P
   Two/Four-Channel, I2C Adjustable Current DAC
logo
Maxim Integrated Produc...
DS4402N++ MAXIM-DS4402N+ Datasheet
154Kb / 9P
   Two/Four-Channel, I2C Adjustable Current DAC
Rev 2; 10/08
More results

Similar Description - DS4402

ManufacturerPart #DatasheetDescription
logo
Dallas Semiconductor
DS4402 DALLAS-DS4402 Datasheet
152Kb / 8P
   Two/Four-Channel, I2C Adjustable Current DAC
logo
Maxim Integrated Produc...
DS4402 MAXIM-DS4402 Datasheet
154Kb / 9P
   Two/Four-Channel, I2C Adjustable Current DAC
Rev 2; 10/08
DS4422 MAXIM-DS4422_09 Datasheet
215Kb / 11P
   Two-/Four-Channel, I2C, 7-Bit Sink/Source Current DAC
Rev 1; 7/09
DS4422 MAXIM-DS4422 Datasheet
222Kb / 10P
   Two-/Four-Channel, I2C, 7-Bit Sink/Source Current DAC
Rev 0; 3/08
DS4412 MAXIM-DS4412_08 Datasheet
147Kb / 10P
   Dual-Channel, I2C Adjustable Sink/Source Current DAC
Rev 1; 10/08
DS4412 MAXIM-DS4412 Datasheet
137Kb / 9P
   Dual-Channel, I2C Adjustable Sink/Source Current DAC
Rev 0; 9/07
logo
Analog Devices
ADAU1772 AD-ADAU1772 Datasheet
6Mb / 117P
   Four ADC, Two DAC Low Power Codec
ADAU1777 AD-ADAU1777_17 Datasheet
1Mb / 109P
   Four-ADC, Two-DAC, Low Power Codec
logo
Exar Corporation
XRP7620 EXAR-XRP7620 Datasheet
509Kb / 11P
   4-Channel Adjustable Current I2C Controlled LED Driver
logo
Maxim Integrated Produc...
DS4432 MAXIM-DS4432 Datasheet
217Kb / 9P
   Dual-Channel, I2C, 7-Bit Sink/Source Current DAC
Rev 0; 12/08
More results


Html Pages

1 2 3 4 5 6 7 8 9


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.NET
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com