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MAX1385 Datasheet(PDF) 8 Page - Maxim Integrated Products |
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MAX1385 Datasheet(HTML) 8 Page - Maxim Integrated Products |
8 / 52 page Dual RF LDMOS Bias Controllers with I2C/SPI Interface 8 _______________________________________________________________________________________ I2C HIGH-SPEED-MODE TIMING CHARACTERISTICS (Note 12, see Figure 2) (GATEVDD = +5.5V for MAX1385, GATEVDD = +11V for MAX1386, AVDD = +5V, DVDD = 2.7V to 5.25V, external VREFADC = +2.5V, external VREFDAC = +2.5V, CREF = 0.1µF, TA = -40°C to +85°C, unless otherwise noted). PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Serial-Clock Frequency fSCL 0 3.4 MHz Setup Time Repeated START Condition tSU;STA 160 ns Hold Time Repeated START Condition tHD;STA 160 ns SCL Pulse-Width Low tLOW 160 ns SCL Pulse-Width High tHIGH 60 ns Data Setup Time tSU;DAT 10 ns Data Hold Time tHD;DAT (Note 17) 0 70 ns Rise Time of SCL Signal, Receiving tRCL 10 40 ns Rise Time of SCL Signal After a Repeated START Condition and After an Acknowledge Bit, Receiving tRCL1 10 80 ns Fall Time of SCL Signal, Receiving tFCL 10 40 ns Rise Time of SDA Signal, Receiving tRDA 10 80 ns Fall Time of SDA Signal, Transmitting tFDA 10 80 ns Setup Time for STOP Condition tSU;STO 160 ns Capacitive Load for Each Bus Line Cb (Note 18) 100 pF Pulse Width of Spikes That are Suppressed by the Input Filter tSP 010 ns |
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