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AGR19125E Datasheet(PDF) 1 Page - TriQuint Semiconductor |
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AGR19125E Datasheet(HTML) 1 Page - TriQuint Semiconductor |
1 / 10 page AGR19125E 125 W, 1930 MHz—1990 MHz, PCS LDMOS RF Power Transistor Introduction The AGR19125E is a 125 W, 28 V N-channel later- ally diffused metal oxide semiconductor (LDMOS) RF power field effect transistor (FET) suitable for personal communication service (PCS) (1930 MHz—1990 MHz), time-division multiple access (TDMA), and single-carrier or multicarrier class AB power amplifier applications. Figure 1. Available Packages Features Typical 2 carrier, N-CDMA performance for VDD = 28 V, IDQ = 1250 mA, F1 = 1958.75 MHz, F2 = 1961.25 MHz, IS-95 (pilot, paging, sync, traffic channels 8—13) 1.2288 MHz channel bandwidth (BW). Adjacent channels measured over a 30 kHz BW at F1 – 0.885 MHz and F2 + 0.885 MHz. Intermodulation distortion products measured over a 1.2288 MHz BW at F1 – 2.5 MHz and F2 + 2.5 MHz. Peak/Average (P/A) = 9.72 dB at 0.01% probability on CCDF: — Output power: 24 W. — Power gain: 15 dB. — Efficiency: 24%. — ACPR: –48 dBc. — IMD3: –34 dBc. — Return loss: –10 dB. High-reliability, gold-metalization process. Low hot carrier injection (HCI) induced bias drift over 20 years. Internally matched. High gain, efficiency, and linearity. Integrated ESD protection. Device can withstand a 10:1 voltage standing wave ratio (VSWR) at 28 Vdc, 1960 MHz, 125 W contin- uous wave (CW) output power. Large signal impedance parameters available. Table 1. Thermal Characteristics Table 2. Absolute Maximum Ratings* * Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are absolute stress rat- ings only. Functional operation of the device is not implied at these or any other conditions in excess of those given in the operational sections of the data sheet. Exposure to absolute maximum ratings for extended periods can adversely affect device reliability. Table 3. ESD Rating* * Although electrostatic discharge (ESD) protection circuitry has been designed into this device, proper precautions must be taken to avoid exposure to ESD and electrical overstress (EOS) during all handling, assembly, and test operations. Agere employs a human-body model (HBM), a machine model (MM), and a charged-device model (CDM) qualification requirement in order to determine ESD-susceptibility limits and protection design evaluation. ESD voltage thresholds are dependent on the circuit parameters used in each of the models, as defined by JEDEC's JESD22-A114B (HBM), JESD22-A115A (MM), and JESD22-C101A (CDM) standards. Caution: MOS devices are susceptible to damage from elec- trostatic charge. Reasonable precautions in han- dling and packaging MOS devices should be observed. AGR19125EU (unflanged) AGR19125EF (flanged) Parameter Sym Value Unit Thermal Resistance, Junction to Case: AGR19125EU AGR19125EF Rı JC Rı JC 0.5 0.5 °C/W °C/W Parameter Sym Value Unit Drain-source Voltage VDSS 65 Vdc Gate-source Voltage VGS –0.5, +15 Vdc Total Dissipation at TC = 25 °C: AGR19125EU AGR19125EF PD PD 350 350 W W Derate Above 25 °C: AGR19125EU AGR19125EF — — 2.0 2.0 W/°C W/°C Operating Junction Tempera- ture TJ 200 °C Storage Temperature Range TSTG –65, +150 °C AGR19125E Minimum (V) Class HBM 500 1B MM 50 A CDM 1500 4 PEAK Devices |
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