125nA Supervisory Circuits with Capacitor-

Adjustable Reset and Watchdog Timeouts

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Detailed Description

The MAX16056–MAX16059 are ultra-low-current 125nA

(typ) µP supervisory circuits that monitor a single sys-

tem supply voltage. These devices assert an active-low

below the factory-trimmed reset threshold, manual

reset is pulled low, or the watchdog timer runs out

(MAX16056/MAX16058). The reset output remains

asserted for an adjustable reset timeout period after

watchdog delay periods are adjustable using external

capacitors.

RESET Output

The MAX16056–MAX16059 µP supervisory circuits assert

a reset to prevent code-execution errors during power-

up, power-down, and brownout conditions. The reset

old plus the hysteresis, an internal timer keeps the reset

output asserted for the capacitor-adjusted reset timeout

deasserts (see Figure 1). The reset function features

immunity to power-supply voltage transients.

Manual-Reset Input (

MR)

Many µP-based products require manual-reset capabil-

ity, allowing the operator, a test technician, or external

logic circuitry to initiate a reset. The MAX16056–

MAX16059 feature an MR input. A logic-low on MR

asserts a reset. RESET remains asserted while MR is

with CMOS logic levels or with open-drain/collector out-

puts (with a pullup resistor). Connect a normally open

momentary switch from MR to GND and a resistor from

nal debounce circuitry is not required. If MR is driven

by long cables or the device is used in a noisy environ-

ment, connect a 0.1µF capacitor from MR to GND to

provide additional noise immunity.

Watchdog Timer

The MAX16056/MAX16058’s watchdog timer circuitry

monitors the µP’s activity. If the µP does not toggle

(high-to-low) the watchdog input (WDI) within the

internal watchdog timer is cleared by: 1) any event that

asserts RESET, by 2) a falling transition at WDI (that

can detect pulses as short as 150ns) or by 3) a transi-

tion (high-to-low or low-to-high) at WDS. While reset is

asserted, the watchdog timer remains cleared and

does not count. As soon as reset deasserts, the watch-

dog timer resumes counting.

There are two modes of watchdog operation, normal

mode and extended mode. In normal mode (Figure 2),

the watchdog timeout period is determined by the

value of the capacitor connected between SWT and

ground. In extended mode (Figure 3), the watchdog

timeout period is multiplied by 128. For example, in

extended mode, a 0.33µF capacitor gives a watchdog

timeout period of 212s (see Table 2). To disable the

watchdog timer function, connect SWT to ground.

external SWT capacitor is sampled after RESET goes

high. When sampling is finished, the capacitor value is

stored in the device and is used to set watchdog time-

out. If RESET goes low before sampling is finished, the

device interrupts sampling, and sampling is restarted

when RESET goes high again.

If the external SWT capacitor is less than 470pF, the

sampling result sets the watchdog timeout to zero. This

causes the watchdog to assert RESET continuously

after sampling is finished. If a PCB manufacturing

the capacitance is very low and RESET is continuously

asserted. If the external SWT capacitor is greater than

5600pF, the sampling result sets the watchdog timeout

to be infinite, disabling the watchdog function.