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MAXQ8913 Datasheet(PDF) 11 Page - Maxim Integrated Products

Part # MAXQ8913
Description  16-Bit, Mixed-Signal Microcontroller with Op Amps, ADC, and DACs for All-in-One Servo Loop Control
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Manufacturer  MAXIM [Maxim Integrated Products]
Direct Link  https://www.maximintegrated.com/en.html
Logo MAXIM - Maxim Integrated Products

MAXQ8913 Datasheet(HTML) 11 Page - Maxim Integrated Products

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16-Bit, Mixed-Signal Microcontroller with Op Amps,
ADC, and DACs for All-in-One Servo Loop Control
______________________________________________________________________________________
11
I2C BUS CONTROLLER TIMING (ACTING AS I2C MASTER)
STANDARD MODE
FAST MODE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
System Frequency
fSYS
1
3.60
MHz
Operating Frequency
fI2C
fSYS/8
fSYS/8
Hz
Hold Time After (Repeated) START
tHD:STA
tHIGH_I2C
tHIGH_I2C
μs
Clock Low Period
tLOW_I2C
5
5
tSYS
Clock High Period
tHIGH_I2C
3
3
tSYS
Setup Time for Repeated START
tSU:STA
tLOW_I2C
tLOW_I2C
μs
Hold Time for Data
tHD:DAT
0
3.45
0
0.9
μs
Setup Time for Data
tSU:DAT
250
100
ns
SDA/SCL Fall Time
tF_I2C
300
20 + 0.1CB
300
ns
SDA/SCL Rise Time
tR_I2C
1000
20 + 0.1CB
300
ns
Setup Time for STOP
tSU:STO
tHIGH_I2C
tHIGH_I2C
μs
Bus-Free Time Between STOP and START
tBUF
tLOW_I2C
tLOW_I2C
μs
Capacitive Load for Each Bus Line
CB
400
400
pF
Noise Margin at the Low Level for Each Connected
Device (Including Hysteresis)
VNL_I2C
0.1 x
VDVDD
0.1 x
VDVDD
V
Noise Margin at the High Level for Each Connected
Device (Including Hysteresis)
VNH_I2C
0.2 x
VDVDD
0.2 x
VDVDD
V
I2C BUS CONTROLLER TIMING (ACTING AS I2C SLAVE)
STANDARD MODE
FAST MODE
PARAMETER
SYMBOL
MIN
MAX
MIN
MAX
UNITS
System Frequency
fSYS
1
3.60
MHz
Operating Frequency
fI2C
fSYS/8
fSYS/8
Hz
System Clock Period
tSYS
1/fI2C
1/fI2C
μs
Hold Time After (Repeated) START
tHD:STA
3tSYS
3tSYS
μs
Clock Low Period
tLOW_I2C
5tSYS
5tSYS
μs
Clock High Period
tHIGH_I2C
3tSYS
3tSYS
μs
Setup Time for Repeated START
tSU:STA
5tSYS
5tSYS
μs
Hold Time for Data
tHD:DAT
0
3.45
0
0.9
μs
Setup Time for Data
tSU:DAT
250
100
ns
SDA/SCL Fall Time
tF_I2C
300
20 + 0.1CB
300
ns
SDA/SCL Rise Time
tR_I2C
1000
20 + 0.1CB
300
ns
Setup Time for STOP
tSU:STO
3tSYS
3tSYS
μs
Bus-Free Time Between STOP and START
tBUF
5tSYS
5tSYS
μs
Capacitive Load for Each Bus Line
CB
400
400
pF
Noise Margin at the Low Level for Each Connected
Device (Including Hysteresis)
VNL_I2C
0.1 x
VDVDD
0.1 x
VDVDD
V
Noise Margin at the High Level for Each Connected
Device (Including Hysteresis)
VNH_I2C
0.2 x
VDVDD
0.2 x
VDVDD
V


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