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ZLF645E0H4832G Datasheet(PDF) 3 Page - Maxim Integrated Products |
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ZLF645E0H4832G Datasheet(HTML) 3 Page - Maxim Integrated Products |
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3 / 201 page  19-4572; Rev 0; 4/09 Revision History ZLF645 Series Flash MCUs Product Specification iii Revision History Each instance in the revision history table reflects a change to this document from its pre- vious revision. For more details, refer to the corresponding pages or appropriate links given in the table below. Date Version Description Page Number December 2008 08 Updated formula in Flash Controller section. Updated VLVD in Table 80 and VFLPE in Table 82 in Electrical Characteristics section. Updated Table 56 through Table 59 in Timers section. Added Flash Programming through the ICP Interface in ICP Interface section. Added Using the Watchdog Timer As a Stop Mode Recovery Source in Reset and Power Management section. Updated Flash Frequency High and Low Byte Registers section and Table 83. Updated Port 1 pins in Figure 1. 67 165, 170 119 61 142 79, 172 4 April 2008 07 Updated Enabling The Flash Byte Programming Interface section. 82 April 2008 06 Deleted “Design Info” subsection and all of its associated text. Updated Flash Memory Overview section; updated Figure 19. Updated Flash Frequency High and Low Byte Registers section. Updated Icc and Icc1 in Table 80. Updated notes in Table 5 and Table 6. Removed “Preliminary” and “Precharacterization Product” notice. Added 20-pin QFN package to Pin Description, Table 3, Table 4, Packaging, Table 87, and Part Number Description. Change P31 to P32 at the beginning of Universal Asynchronous Receiver/Transmitter. All 67, 68 79 165 9, 10 All 5, 6, 7, 176, 184, 186 85 January 2008 05 Updated Flash Code Protection Against External Access and Flash Frequency High and Low Byte Registers. 73, 79 January 2008 04 Chapter Reset and Power Management: Updated Table 68. 142 |
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