M12L64164A-7TIG datasheet(7/45 Pages) ESMT

Part #	M12L64164A-7TIG

Description	1M x 16 Bit x 4 Banks Synchronous DRAM

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Manufacturer	ESMT [Elite Semiconductor Memory Technology Inc.]

Direct Link	http://www.esmt.com.tw/index.asp

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ESMT

M12L64164A

Operation Temperature Condition -40°C~85°C

Elite Semiconductor Memory Technology Inc.

Publication Date: Dec. 2007

Revision: 1.2

7/45

AC CHARACTERISTICS (AC operating condition unless otherwise noted)

-5

-6

-7

PARAMATER

SYMBOL

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

NOTE

CAS latency = 3

5

6

7

CLK cycle time

CAS latency = 2

tCC

10

1000

10

1000

10

1000

ns

1

CAS latency = 3

4.5

5.5

6

CLK to valid

output delay

CAS latency = 2

tSAC

6

ns

1,2

CAS latency = 3

2.0

2.5

Output data

hold time

CAS latency = 2

tOH

2.0

2.5

ns

2

CLK high pulsh width

tCH

2.5

ns

3

CLK low pulsh width

tCL

2.5

ns

3

Input setup time

tSS

1.5

ns

3

Input hold time

tSH

1

ns

3

CLK to output in Low-Z

tSLZ

0

ns

2

CAS latency = 3

4.5

5.5

6

CLK to output

in Hi-Z

CAS latency = 2

tSHZ

6

ns

-

Note :

1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns. (tr/2 - 0.5) ns should be considered.

3. Assumed input rise and fall time (tr & tf) =1ns.

If tr & tf is longer than 1ns. transient time compensation should be considered.

i.e., [(tr + tf)/2 – 1] ns should be added to the parameter.

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