AS5SP128K36DQ

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Revision 1.0 03/22/04

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4

COTS PEM

AS5SP128K36DQ

Austin Semiconductor, Inc.

SSRAM

Linear Burst

Burst Control

State

Case 1

Case 2

Case 3

Case 4

Pin [MODE]

LOW

A1A0A1A0A1A0A1A0

First Address

000110

11

011011

00

101100

01

Fourth Address

110001

10

Synchronous Truth Tables

Burst Sequence Tables

Write Table

Absolute Maximum Ratings*

*Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions greater than those

indicated in the operational sections of this specification is not implied. Exposure

to absolute maximum conditions for any duration or segment of time may affect

device reliability.

Capacitance

Asynchronous Truth Table

AC Test Loads

CE1\

CE2

CE3\

ADSP\

ADSC\

ADV

WT / RD

CLK

Address Accessed

Operation

H

X

X

X

L

X

X

NA

Not Selected

L

L

X

L

X

X

X

NA

Not Selected

L

X

H

L

X

X

X

NA

Not Selected

L

L

X

X

L

X

X

NA

Not Selected

L

X

H

X

L

X

X

NA

Not Selected

L

H

L

L

X

X

X

External Address

Begin Burst, READ

L

H

L

H

L

X

WT

External Address

Begin Burst, WRITE

L

H

L

H

L

X

RD

External Address

Begin Burst, READ

X

X

X

H

H

L

RD

Next Address

Continue Burst, READ

H

X

X

X

H

L

RD

Next Address

Continue Burst, READ

X

X

X

H

H

L

WT

Next Address

Continue Burst, WRITE

H

X

X

X

H

L

WT

Next Address

Continue Burst, WRITE

X

X

X

H

H

H

RD

Current Address

Suspend Burst, READ

H

X

X

X

H

H

RD

Current Address

Suspend Burst, READ

X

X

X

H

H

H

WT

Current Address

Suspend Burst, WRITE

H

X

X

X

H

H

WT

Current Address

Suspend Burst, WRITE

Notes:

1. X = Don’t Care

2. W T= W RITE operation in W RITE TABLE, RD= READ operation in WRITE TABLE

GW\

BW\

BWa\

BWb\

BWc\

BWd\

Operation

HHX

X

X

X

READ

H

L

H

H

H

H

READ

H

L

L

H

H

H

WRITE Byte [A]

HL

HL

H

H

WRITE Byte [B]

H

L

H

H

L

L

WRITE Byte [C], [D]

H

L

L

L

L

L

WRITE ALL Bytes

L

X

X

X

X

X

WRITE ALL Bytes

Parameter

Symbol

Min.

Max.

Units

Voltage on VDD Pin

VDD

-0.3

4.6

V

Voltage on VDDQ Pins

VDDQ

VDD

V

Voltage on Input Pins

VIN

-0.3

VDD+0.3

V

Voltage on I/O Pins

VIO

-0.3

VDDQ+0.3

V

Power Dissipation

PD

1.6

W

Storage Temperature

tSTG

-65

150

Operating Temperatures

/CT

070

[Screening Levels]

/IT

-40

85

/ET

-40

105

/XT

-55

125

Parameter

Symbol

Max.

Units

Input Capacitance

CI

5.0

pF

Input/Output Capacitance

CIO

5.0

pF

Clock Input Capacitance

CCLK

5.0

pF

R= 1538 ohm@2.5v

R= 351 ohm@3.3v

3.3/2.5v

Output

Diagram [B]

5 pF

R= 317 ohm@3.3v

R= 1667 ohm@2.5v

Output

Zo=50 ohm

30 pF

Rt = 50 ohm

Vt= Termination Voltage

Rt= Termination Resistor

Vt= 1.50v for 3.3v VDDQ

Vt= 1.25v for 2.5v VDDQ

Diagram [A]

Operation

ZZ

OE\

I/O Status

Power-Down (SLEEP)

H

X

High-Z

READ

L

L

DQ

LH

High-Z

WRITE

L

X

Din, High-Z

De-Selected

L

X

High-Z

Interleaved Burst

Burst Control

State

Case 1

Case 2

Case 3

Case 4

Pin [MODE]

HIGH

A1

A0

A1

A0

A1

A0

A1

A0

First Address

00011011

01001110

10110001

Fourth Address

11100100