SSRAM

SSRAM

SSRAM

SSRAM

SSRAM

AS5SS256K36 &

AS5SS256K36A

AS5SS256K36 &

AS5SS256K36A

Rev. 3.6 06/05

Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.

4

Austin Semiconductor, Inc.

PIN DESCRIPTION (continued)

Pin Number

SYMBOL

TYPE

DESCRIPTION

84

ASDP\

Input

Synchronous Address Status Processor: This active LOW inputs

interrupts any ongoing burst, causing a new external address to be

registered. A READ is performed using the new address, independent of

the byte write enables and ADSC\, but dependent upon CE\, CE2 and

CE2\. ADSP\ is ignored if CE\ is HIGH. Power-down state is entered if

CE2 is LOW or CE2\ is HIGH.

31

MODE

Input

MODE: This inputs selects the burst sequence. A LOW on this pin

select "linear burst." NC or HIGH on this pin selects "interleaved burst."

Do not alter input state while device is operating.

64

ZZ

Input

Snooze Enable: This active HIGH, asynchronous input causes the

device to enter a low-power standby mode in which all data in the

memory array is retained. When ZZ is active, all other inputs are

ignored.

(a) 52, 53, 56-59,

62, 63

(b) 68, 69, 72-75,

78, 79

(c) 2, 3, 6-9, 12,

13

(d) 18, 19, 22-25,

28, 29

DQa

DQb

DQc

DQd

Input/

Output

SRAM Data I/O's: Byte "a" is DQa pins; Byte "b" is DQb pins; Byte "c" is

DQc pins; Byte "d" is DQd pins. Input data must meet setup and hold

times around the rising edge of CLK.

51

80

1

30

NC/DQPa

NC/DQPb

NC/DQPc

NC/DQPd

NC/ I/O

Parity Data I/Os: Byte "a" parity is DQPa; Byte "b" parity is DQPb; Byte

"c" parity is DQPc; Byte "d" parity is DQPd.

15, 41, 65, 91

Supply

Power Supply: See DC Electrical Characteristics and Operating

Conditions for range.

4, 11, 20, 27, 54,

61, 70, 77

Supply

Isolated Output Buffer Supply: See DC Electrical Characteristics and

Operating Conditions for range.

5, 10, 14, 17, 21,

26, 40, 55, 60, 67,

71, 76, 90

Vss

Supply Ground: GND

38, 39

DNU

---

Do Not Use: These signals may either be unconnected or wired to GND

to improve package heat dissipation.

16, 66

NC

---

No Connect: These signals are not internally connected and may be

connected to GND to improve package heat dissipation.

42

43 (A version)

NF

---

No Function: These pins are internally connected to the die and have

the capacitance of an input pin. It is allowable to leave these pins

unconnected or driven by signals. On the 3 CE version, pin 42 is

reserved as an address upgrade pin for the 16Mb Synchronous Burst.