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AS8S512K32 Datasheet(PDF) 5 Page - Austin Semiconductor |
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AS8S512K32 Datasheet(HTML) 5 Page - Austin Semiconductor |
5 / 14 page SRAM SRAM SRAM SRAM SRAM AS8S512K32 & AS8S512K32A AS8S512K32 & AS8S512K32A Rev. 6.0 6/05 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 5 Austin Semiconductor, Inc. ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS (NOTE 5) (-55oC<T A < 125 oC and -40oC to +85oC; V CC = 5V +10%) MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX READ cycle time tRC 12 15 17 20 25 35 45 55 ns Address access time tAA 12 15 17 20 25 35 45 55 ns Chip select access time tACS 12 15 17 20 25 35 45 55 ns Output hold from address change tOH 22 222222 ns Chip select to output in Low-Z tLZCS 22 222222 ns 4,6,7 Chip select to output in High-Z tHZCS 78 9 1012152020 ns 4,6,7 Output enable access time tAOE 78 9 1012152020 ns Output enable to output in Low-Z tLZOE 00 000000 ns 4,6 Output disable to output in High-Z tHZOE 12 12 12 15 20 20 ns 4,6 WRITE cycle time tWC 12 15 17 20 25 35 45 55 ns Chip select to end of write tCW 10 12 15 15 17 20 25 25 ns Address valid to end of write tAW 10 12 15 15 17 20 25 25 ns Address setup time tAS 22222222 ns Address hold from end of write tAH 11111111 ns WRITE pulse width tWP1 10 12 15 15 17 20 25 25 ns WRITE pulse width tWP2 10 12 15 15 17 20 25 25 ns Data setup time tDS 8 10121012152020 ns Data hold time tDH 00000000 ns Write disable to output in Low-z tLZWE 22222222 ns 4,6,7 Write enable to output in High-Z tHZWE 7 8 9 1113151515 ns 4,6,7 UNITS -35 -12 -15 -45 -55 WRITE CYCLE READ CYCLE DESCRIPTION -20 -17 -25 SYMBOL NOTES |
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