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AD5422AREZ Datasheet(PDF) 6 Page - Analog Devices |
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AD5422AREZ Datasheet(HTML) 6 Page - Analog Devices |
6 / 40 page AD5412/AD5422 Rev. A | Page 6 of 40 Parameter1 Min Typ Max Unit Test Conditions/Comments OUTPUT CHARACTERISTICS3 Current Loop Compliance Voltage 0 AVDD − 2.5 V Output Current Drift vs. Time Drift after 1000 hours, TA = 125°C 50 ppm FSR Internal RSET 20 ppm FSR External RSET Resistive Load 1200 Ω Inductive Load 50 mH TA = 25 °C DC PSRR 1 μA/V Output Impedance 50 MΩ Output Current Leakage When Output Is Disabled 60 pA REFERENCE INPUT/OUTPUT Reference Input3 Reference Input Voltage 4.95 5 5.05 V For specified performance DC Input Impedance 27 40 kΩ Reference Output Output Voltage 4.995 5 5.005 TA = 25°C Reference Temperature Coefficient (TC)3, 5 1.8 10 ppm/°C Output Noise (0.1 Hz to 10 Hz)3 10 μV p-p Noise Spectral Density3 100 nV/√Hz At 10 kHz Output Voltage Drift vs. Time3 50 ppm Drift after 1000 hours, TA = 125°C Capacitive Load3 600 nF Load Current3 5 mA Short-Circuit Current3 7 mA Load Regulation3 95 ppm/mA DIGITAL INPUTS3 JEDEC compliant Input High Voltage, VIH 2 V Input Low Voltage, VIL 0.8 V Input Current −1 +1 μA Per pin Pin Capacitance 10 pF Per pin DIGITAL OUTPUTS3 SDO Output Low Voltage, VOL 0.4 V Sinking 200 μA Output High Voltage, VOH DVCC − 0.5 V Sourcing 200 μA High Impedance Leakage Current −1 +1 μA High Impedance Output Capacitance 5 pF FAULT Output Low Voltage, VOL 0.4 V 10 kΩ pull-up resistor to DVCC Output Low Voltage, VOL 0.6 V At 2.5 mA Output High Voltage, VOH 3.6 V 10 kΩ pull-up resistor to DVCC POWER REQUIREMENTS AVDD 10.8 40 V AVSS −26.4 0 V |AVSS| + AVDD 10.8 52.8 V DVCC Input Voltage 2.7 5.5 V Internal supply disabled Output Voltage 4.5 V DVCC, which can be overdriven up to 5.5 V Output Load Current3 5 mA Short-Circuit Current3 20 mA |
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