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AD9548BCPZ-REEL7 Datasheet(PDF) 10 Page - Analog Devices

Part # AD9548BCPZ-REEL7
Description  Quad/Octal Input Network Clock Generator/Synchronizer
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD9548BCPZ-REEL7 Datasheet(HTML) 10 Page - Analog Devices

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AD9548
Rev. 0 | Page 10 of 112
TIME DURATION OF DIGITAL FUNCTIONS
Table 13.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
TIME DURATION OF DIGITAL FUNCTIONS
EEPROM-to-Register Download Time
25
ms
Using default EEPROM storage
sequence (see Register 0E10 to
Register 0E3F)
Register-to-EEPROM Upload Time
200
ms
Using default EEPROM storage
sequence (see Register 0E10 to
Register 0E3F
Minimum Power-Down Exit Time
10.5
μs
Dependent on loop-filter bandwidth
Maximum Time from Assertion of the RESET
pin to the M0 to M7 Pins Entering High
Impedance State
45
ns
DIGITAL PLL
Table 14.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
DIGITAL PLL
Phase-Frequency Detector (PFD)
Input Frequency Range
1
107
Hz
Maximum fPFD1: fS/1002
Loop Bandwidth
0.001
105
Hz
Programmable design parameter; maximum
fLOOP = fREF/(20R)3
Phase Margin
30
89
Degrees
Programmable design parameter
Reference Input (R) Division Factor
1
230
1, 2, …, 1,073,741,824
Integer Feedback (S) Division Factor
8
230
8, 9, …, 1,073,741,824
Fractional Feedback Divide Ratio
0
0.999
Maximum value: 1022/1023.
1 fPFD is the frequency at the input to the phase-frequency detector.
2 fS is the sample rate of the output DAC.
3 fREF is the frequency of the active reference; R is the frequency division factor determined by the R-divider.
DIGITAL PLL LOCK DETECTION
Table 15.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
PHASE LOCK DETECTOR
Threshold Programming Range
0.001
65.5
ns
Threshold Resolution
1
ps
FREQUENCY LOCK DETECTOR
Threshold Programming Range
0.001
16,700
ns
Reference-to-feedback period difference
Threshold Resolution
1
ps
HOLDOVER SPECIFICATIONS
Table 16.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
HOLDOVER SPECIFICATIONS
Frequency Accuracy
<0.01
ppm
Excludes frequency drift of SYSCLK source;
excludes frequency drift of input reference prior
to entering holdover


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