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XRT73LC00A Datasheet(PDF) 11 Page - Exar Corporation |
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XRT73LC00A Datasheet(HTML) 11 Page - Exar Corporation |
11 / 63 page XRT73LC00A 6 E3/DS3/STS-1 LINE INTERFACE UNIT REV. 1.0.1 19 SDI/ (LOSMUTEN) I Serial Data Input for the Microprocessor Serial Interface (HOST Mode) or MUTE-upon-LOS Enable Input (Hardware Mode): The function of this input pin depends upon whether the XRT73LC00A is operat- ing in the HOST or the Hardware Mode. Serial Data Input for the Microprocessor Serial Interface (HOST Mode): This pin is used to read or write data into the Command Registers of the Micro- processor Serial Interface. The Read/Write bit, the Address Values of the Com- mand Registers and Data Value to be written during Write Operations are applied to this pin. This input is sampled on the rising edge of the SCLK pin (pin 21). MUTE-upon-LOS Enable Input (Hardware Mode): In the Hardware Mode this input pin is used to configure the XRT73LC00A to Mute the recovered data via the RPOS and RNEG output pins whenever it declares an LOS condition. Setting this input pin “High” configures the XRT73LC00A to automatically pull the RPOS and RNEG output pins to GND whenever it is declaring an LOS condi- tion, thereby Muting the data being output to the Terminal Equipment. Setting this input pin “Low” configures the XRT73LC00A to NOT automatically Mute the recovered data whenever an LOS condition is declared. 20 SDO/(LCV) O Serial Data Output from the Controller Port/(Line Code Violation Output (LCV) Indicator.): The function of this input pin depends upon whether the XRT73LC00A is operat- ing in the HOST or the Hardware Mode. HOST Mode - Microprocessor Serial Interface - Serial Data Output. This pin serially outputs the contents of the specified Command Register during Read Operations. The data on this pin is updated on the falling edge of the SCLK input signal. This pin is tri-stated upon completion of data transfer. Hardware Mode - Line Code Violation Output Indicator. This pin pulses “High” for one bit period any time the Receive Section of the XRT73LC00A detects a Line Code Violation in the incoming E3, DS3 or STS-1 Data Stream. 21 SCLK/ (ENDECDIS) I Microprocessor Serial Interface Clock Signal/Encoder Disable: HOST Mode - Microprocessor Serial Interface Clock Signal This signal is used to sample the data on the SDI pin on the rising edge of this signal. During Read operations, the Microprocessor Serial Interface updates the SDO output on the falling edge of this signal. Hardware Mode - B3ZS/HDB3 Encoder/Decoder Disable Setting this input pin “High” disables both the B3ZS/HDB3 Encoder and Decoder. This setting configures the Transmit Section of the XRT73LC00A to transmit data to the remote terminal equipment via the AMI Line Code. This set- ting also configures the Receive Section to receive a line signal via the AMI Line Code. Setting this input pin “Low” enables both the B3ZS/HDB3 Encoder and Decoder. This setting configures the Transmit Section of the XRT73LC00A to transmit data in the B3ZS format for DS3/STS-1 applications or the HDB3 format for E3 applications. This setting configures the Receive Section to receive a line signal that has been encoded into the B3ZS or HDB3 line code. PIN DESCRIPTION PIN # SYMBOL TYPE DESCRIPTION |
Similar Part No. - XRT73LC00A_08 |
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Similar Description - XRT73LC00A_08 |
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