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XRT86VL38IB484 Datasheet(PDF) 10 Page - Exar Corporation |
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XRT86VL38IB484 Datasheet(HTML) 10 Page - Exar Corporation |
10 / 154 page XRT86VL3X VII T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION REV. 1.2.3 LIST OF TABLES Table 1:: Bit Ordering and Usage .................................................................................................................................... 30 Table 2:: Framing Format for PMON Status Inserted within LAPD by Initiating APR ...................................................... 31 Table 3:: Random Bit Sequence Polynomials .................................................................................................................. 48 Table 4:: Short Haul Line Build Out ................................................................................................................................. 51 Table 5:: Selecting the Internal Impedance ..................................................................................................................... 53 Table 6:: Mapping a T1 Frame into an E1 Frane ............................................................................................................. 74 Table 7:: Bit Format of Timeslot 0 octet within a FAS E1 Frame ................................................................................... 112 Table 8:: Bit Format of Timeslot 0 octet within a Non-FAS E1 Frame ........................................................................... 113 Table 9:: Bit Format of all Timeslot 0 octets within a CRC Multi-frame .......................................................................... 114 Table 10:: Superframe Format ....................................................................................................................................... 118 Table 11:: Extended Superframe Format ....................................................................................................................... 120 Table 12:: Non-Signaling Framing Format ..................................................................................................................... 121 Table 13:: SLC®96 Fs Bit Contents ............................................................................................................................... 122 Table 14:: XRT86VL32 Power Consumption ................................................................................................................ 123 Table 15:: XRT86VL34 Power Consumption ................................................................................................................ 124 Table 16:: XRT86VL38 Power Consumption ................................................................................................................ 124 Table 17:: E1 Receiver Electrical Characteristics .......................................................................................................... 132 Table 18:: T1 Receiver Electrical Characteristics .......................................................................................................... 133 Table 19:: E1 Transmitter Electrical Characteristics ...................................................................................................... 134 Table 20:: E1 Transmit Return Loss Requirement ......................................................................................................... 134 Table 21:: T1 Transmitter Electrical Characteristics ...................................................................................................... 134 Table 22:: Transmit Pulse Mask Specification ............................................................................................................... 135 Table 23:: DSX1 Interface Isolated pulse mask and corner points ................................................................................ 136 Table 24:: AC Electrical Characteristics ......................................................................................................................... 137 Table 25:: Intel Microprocessor Interface Timing Specifications .................................................................................... 137 Table 26:: Intel Microprocessor Interface Timing Specifications .................................................................................... 139 Table 27:: Motorola Asychronous Mode Microprocessor Interface Timing Specifications ............................................. 140 Table 28:: Power PC 403 Microprocessor Interface Timing Specifications ................................................................... 141 |
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