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XRT91L31 Datasheet(PDF) 6 Page - Exar Corporation |
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XRT91L31 Datasheet(HTML) 6 Page - Exar Corporation |
6 / 41 page XRT91L31 6 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER REV. 1.0.2 PIN DESCRIPTIONS TABLE 2: HARDWARE CONTROL PIN DESCRIPTION NAME LEVEL TYPE PIN DESCRIPTION RESET LVTTL, LVCMOS I 1 Master Reset Input Active "High." When this pin is pulled "High" , the internal state machines are set to their default state. "Low" = Normal Operation "High" = Master Hardware Reset STS12/STS3 LVTTL, LVCMOS I 59 Data Rate Selection Selects SONET/SDH transmission and reception speed rate "Low" = STS-3/STM-1 155.52 Mbps "High" = STS-12/STM-4 622.08 Mbps CMUFREQSEL LVTTL, LVCMOS I 3 Clock Multiplier Unit Reference Frequency Select This pin is used to select the frequency of the REFCLKP/N or TTLREFCLK input to the CMU. "Low" = 77.76 MHz reference clock "High" = 19.44 MHz reference clock NOTE: REFCLKP/N or TTLREFCLK input should be generated from an LVPECL/LVTTL crystal oscillator which has a frequency accuracy better than 20ppm in order for the transmitted data rate frequency to have the necessary accuracy required for SONET systems.. CDR_BW/VDD LVTTL, LVCMOS I 15 CDR Bandwidth Select This pin is used to select the CDR Bandwidth "Low" = Narrow BW, (Meets SONET jitter transfer requirement) "High" (VDD) = Wide Band Width. CMU- FREQSEL STS12/ STS3 REFCLKP/N OR TTLREFCLK REFERENCE FREQUENCY DATA RATE 00 77.76 MHz STS-3/STM-1 155.52 Mbps 0 1 77.76 MHz STS-12/STM-4 622.08 Mbps 10 19.44 MHz STS-3/STM-1 155.52 Mbps 1 1 19.44 MHz STS-12/STM-4 622.08 Mbps |
Similar Part No. - XRT91L31_08 |
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Similar Description - XRT91L31_08 |
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