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FSL137HNY Datasheet(PDF) 6 Page - Fairchild Semiconductor |
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FSL137HNY Datasheet(HTML) 6 Page - Fairchild Semiconductor |
6 / 13 page © 2009 Fairchild Semiconductor Corporation www.fairchildsemi.com FSL137H Rev. 1.0.0 6 Electrical Characteristics (Continued) VDD=15V, TA=25°C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit VIN Section VIN-ON PWM Turn-on Threshold Voltage 0.98 1.03 1.08 V VIN-RL Release Latch Voltage 0.65 0.70 0.75 V VIN-H Pull HIGH Latch Trigger Level 4.4 4.7 5.0 V tIN-H Pull HIGH Latch Debounce Time 100 µs VIN-L Pull LOW Auto Recovery Trigger Level 0.2 0.3 0.4 V Feedback Input Section AV FB Voltage to Current-Sense Attenuation 1/4.0 V/V ZFB Input Impedance 9 kΩ VFB-OPEN Output High Voltage 5 V VFB-OLP FB Open-Loop Trigger Level 4.4 4.6 4.8 V tD-OLP Delay Time of FB Pin Open-loop Protection 50 56 59 ms VFB-N Green-Mode Entry FB Voltage 2.3 2.5 2.7 V VFB-G Green-Mode Ending FB Voltage VFB-N - 0.1 V VFB-ZDC Zero Duty Cycle FB Voltage 1.9 2.1 2.3 V Figure 4. VFB vs. PWM Frequency Symbol Parameter Conditions Min. Typ. Max. Unit Current-Sense Section ILIM at VIN=1.2V Peak Current Limit VIN=1.2V 0.8 A ILIM at VIN=3.6V Peak Current Limit VIN=3.6V 0.65 A tSS Period during Soft Startup Time (9) 4.5 5.0 5.5 ms Over-Temperature Protection Section (OTP) TOTP Protection Junction Temperature (9, 11) 142 °C Notes: 9. These parameters, although guaranteed, are not 100% tested in production. 10. Pulse test: pulse width ≤ 300μs, duty ≤ 2%. 11. When activated, the output is disabled and the latch is turned off. 12. These parameters, although guaranteed, are tested in wafer process. PWM Frequency fOSC fOSC-G VFB-N VFB-G VFB-ZDC VFB |
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