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XRT83VSH316 Datasheet(PDF) 1 Page - Exar Corporation |
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XRT83VSH316 Datasheet(HTML) 1 Page - Exar Corporation |
1 / 97 page Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com XRT83VSH316 16-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT OCTOBER 2007 REV. 1.0.0 GENERAL DESCRIPTION The XRT83VSH316 is a fully integrated 16-channel short-haul line interface unit (LIU) that operates from a 1.8V Inner Core and 3.3V I/O power supplies. Using internal termination, the LIU provides one bill of materials to operate in T1, E1, or J1 mode independently on a per channel basis with minimum external components. The LIU features are programmed through a standard parallel microprocessor interface or SPI (Serial Mode). EXAR’s LIU has patented high impedance circuits that allow the transmitter outputs and receiver inputs to be high impedance when experiencing a power failure or when the LIU is powered off. Key design features within the LIU optimize 1:1 or 1+1 redundancy and non-intrusive monitoring applications to ensure reliability without using relays. The on-chip clock synthesizer generates T1/E1/J1 clock rates from a selectable external clock frequency and has five output clock references that can be used for external timing (8kHz, 1.544Mhz, 2.048Mhz, nxT1/J1, nxE1). Additional features include System Side LOS, AIS, QRSS/PRBS and Line Side RLOS, AIS, QRSS/ PRBS, DMO with 16-bit LCV counters and diagnostic loopback modes for each channel. APPLICATIONS • T1 Digital Cross Connects (DSX-1) • ISDN Primary Rate Interface • CSU/DSU E1/T1/J1 Interface • T1/E1/J1 LAN/WAN Routers • Public Switching Systems and PBX Interfaces • T1/E1/J1 Multiplexer and Channel Banks • Integrated Multi-Service Access Platforms (IMAPs) • Integrated Access Devices (IADs) • Inverse Multiplexing for ATM (IMA) • Wireless Base Stations FIGURE 1. BLOCK DIAGRAM OF THE XRT83VSH316 B8ZS/ HDB3 Decoder 32-bit/64-bit Jitter Attenuator Clock & Data Recovery( CDR) Peak Detector & Slicer System Generator SAIS, SLOS, SPRBS Line Detector AIS, RLOS, LCV RNEG/ LCV RPOS RCLK RTIP RRING B8ZS/ HDB3 Encoder 32-bit/64-bit Jitter Attenuator Timing Control Tx Pulse Shaper Line Driver Analog Loop Back Digital Loop Back MUX DMO Remote Loop Back System Detector SAIS, SLOS, SPRBS Line Generator PRBS TPOS TNEG TCLK TTIP TRING AIS JTAG Test PLL Parallel Microprocessor SPI Microprocessor Channel N of16 RLOS DMO SLOS TxON RxTSEL RxON MCLKnOUT PRBS |
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