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XRT86SH221 Datasheet(PDF) 10 Page - Exar Corporation |
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XRT86SH221 Datasheet(HTML) 10 Page - Exar Corporation |
10 / 357 page XRT86SH221 VII SDH-TO-PDH FRAMER/MAPPER WITH INTEGRATED 21-CHANNEL E1 SH LIU REV. 1.0.1 TABLE 242: CHANNEL CONTROL - VT-DEMAPPER REI-V EVENT COUNT REGISTER 0 (VTDREIECR0 = 0XND4F) ........................ 264 TABLE 243: CHANNEL CONTROL - VT-DEMAPPER RECEIVE APS REGISTER 1 (VTDRAPSR1 = 0XND52) .................................... 265 TABLE 244: CHANNEL CONTROL - VT-DEMAPPER RECEIVE APS REGISTER 0 (VTDRAPSR0 = 0XND53) .................................... 267 TABLE 245: CHANNEL CONTROL - VT-MAPPER TRANSMIT APS REGISTER 1 (VTMTAPSR1 = 0XND56) ....................................... 269 TABLE 246: CHANNEL CONTROL - VT-MAPPER TRANSMIT APS/K4 REGISTER 0 (VTMTAPSR0 = 0XND57) .................................. 270 TABLE 247: CHANNEL CONTROL - VT-DEMAPPER TANDEM CONNECTION - RECEIVE BIP-2 ERROR COUNT REGISTER 2 (VTDTCBIP2ECR = 0XND59) ................................................................................................................................................................. 270 TABLE 248: CHANNEL CONTROL - VT-DEMAPPER TANDEM CONNECTION - RECEIVE REI-V EVENT COUNT REGISTER 1 (VTDTCREIECR = 0XND5B) ................................................................................................................................................................. 270 TABLE 249: CHANNEL CONTROL - VT-DEMAPPER TANDEM CONNECTION - RECEIVE OEI EVENT COUNT REGISTER 0 (VTDTCOEIECR = 0XND5F) .................................................................................................................................................................... 271 TABLE 250: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT STATUS REGISTER 1 (VTDCSR1 = 0XND60) ................................. 271 TABLE 251: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT STATUS REGISTER 0 (VTDCSR0 = 0XND61) ................................. 272 TABLE 252: CHANNEL CONTROL - VT-DEMAPPER TANDEM CONNECTION STATUS REGISTER (VTDTCSR = 0XND62) 274 TABLE 253: CHANNEL CONTROL - VT-DEMAPPER J2 BYTE STATUS REGISTER (VTDJ2BSR = 0XND63) ...................................... 276 TABLE 254: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT STATUS REGISTER 1 (VTDCSR1 = 0XND64) ................................. 277 TABLE 255: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT STATUS REGISTER 0 (VTDCSR0 = 0XND65) ................................. 278 TABLE 256: CHANNEL CONTROL - VT-DEMAPPER TANDEM CONNECTION INTERRUPT STATUS REGISTER (VTDTCISR = 0XND66) 280 TABLE 257: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT STATUS REGISTER 0 (VTDISR0 = 0XND67) ................................... 282 TABLE 258: CHANNEL CONTROL - VT-DEMAPPER INTERRUPT ENABLE REGISTER 2 (VTDIER2 = 0XND68) ................................... 283 TABLE 259: CHANNEL CONTROL - VT-DE-MAPPER INTERRUPT ENABLE REGISTER 1 (VTDIER1 = 0XND69) ................................. 284 TABLE 260: CHANNEL CONTROL - VT-DE-MAPPER TANDEM CONNECTION INTERRUPT ENABLE REGISTER (VTDTCIER = 0XND6A) 286 TABLE 261: CHANNEL CONTROL - VT-DE-MAPPER INTERRUPT ENABLE REGISTER 0 (VTDIER0 = 0XND6B) ................................. 288 TABLE 262: CHANNEL CONTROL - VT-DE-MAPPER PATH TRACE BUFFER CONTROL REGISTER (VTDPTBCR = 0XND71) .............. 289 TABLE 263: CHANNEL CONTROL - VT-DE-MAPPER AUTO AIS CONTROL REGISTER 1 (VTDAAISCR1 = 0XND72) ......................... 291 TABLE 264: CHANNEL CONTROL - VT-DE-MAPPER AUTO AIS CONTROL REGISTER 0 (VTDAAISCR0 = 0XND73) ......................... 293 TABLE 265: CHANNEL CONTROL - VT-MAPPER TRANSMIT J2 BYTE VALUE REGISTER (VTMJ2VR = 0XND76) ............................... 296 TABLE 266: CHANNEL CONTROL - VT-MAPPER TRANSMIT N2 BYTE VALUE REGISTER (VTMN2VR = 0XND77) ............................. 296 TABLE 267: CHANNEL CONTROL - VT-MAPPER TRANSMIT PATH TRACE MESSAGE CONTROL REGISTER (VTMPTMCR = 0XND79) 297 TABLE 268: CHANNEL CONTROL - VT-MAPPER TRANSMIT N2 CONTROL REGISTER (VTMN2CR = 0XND7B) ................................. 299 TABLE 269: CHANNEL CONTROL - VT-MAPPER TRANSMIT TANDEM CONNECTION RDI-V CONTROL REGISTER 1 (VTMTCRDICR1 = 0XND7E) .................................................................................................................................................................... 300 TABLE 270: CHANNEL CONTROL - VT-MAPPER TRANSMIT TANDEM CONNECTION RDI-V CONTROL REGISTER 0 (VTMTCRDICR0 = 0XND7F) .................................................................................................................................................................... 301 TABLE 271: CHANNEL CONTROL - VT-MAPPER TRANSMIT TANDEM CONNECTION ODI-V CONTROL REGISTER 1 (VTMTCODICR1 = 0XND82) .................................................................................................................................................................... 303 TABLE 272: CHANNEL CONTROL - VT-MAPPER TRANSMIT TANDEM CONNECTION ODI-V CONTROL REGISTER 0 (VTMTCODICR0 = 0XND83) .................................................................................................................................................................... 304 TABLE 273: CHANNEL CONTROL - VT-MAPPER TRANSMIT RDI-V CONTROL REGISTER 3 (VTMRDICR3 = 0XND84) ..................... 306 TABLE 274: CHANNEL CONTROL - VT-MAPPER TRANSMIT RDI-V CONTROL REGISTER 2 (VTMRDICR2 = 0XND85) ..................... 307 TABLE 275: CHANNEL CONTROL - VT-MAPPER TRANSMIT RDI-V CONTROL REGISTER 1 (VTMRDICR1 = 0XND86) ..................... 308 TABLE 276: CHANNEL CONTROL - VT-MAPPER TRANSMIT RDI-V CONTROL REGISTER 0 (VTMRDICR0 = 0XND87) ..................... 309 TABLE 277: RECEIVE J2 TRACE IDENTIFIER MESSAGE MEMORY BUFFER (VTDJ2MEM00 = 0X1E00 - VTDJ2MEM3F = 0X1E3F) ......................................................................................................................................... 310 TABLE 278: RECEIVE N2 ACCESS POINT IDENTIFIER MESSAGE MEMORY BUFFER (VTDN2MEM20 = 0XNE20 - VTDN2MEM2F = 0XNE2F) ...................................................................................................................................... 310 TABLE 279: TRANSMIT J2 TRACE IDENTIFIER MESSAGE MEMORY BUFFER (VTMJ2MEM00 = 0X1F00 - VTMJ2MEM3F = 0X1F3F) ......................................................................................................................................... 311 TABLE 280: TRANSMIT N2 ACESS POINT IDENTIFIER MESSAGE MEMORY BUFFER (VTMN2MEM20 = 0XNF20 - VTMN2MEM2F = 0XNF2F) ..................................................................................................................................... 311 7.0 MICROPROCESSOR INTERFACE TIMING ........................................................................................ 312 7.1 MICROPROCESSOR INTERFACE TIMING - INTEL ASYNCHRONOUS MODE .......................................... 312 FIGURE 55. INTEL-ASYNCHRONOUS MODE TIMING - WRITE OPERATION......................................................................................... 312 TABLE 281 INTEL ASYNCHRONOUS MODE TIMING - WRITE OPERATION ......................................................................................... 313 FIGURE 56. INTEL-ASYNCHRONOUS MODE TIMING - READ OPERATION .......................................................................................... 313 TABLE 282 INTEL ASYNCHRONOUS MODE TIMING - READ OPERATION ........................................................................................... 313 7.2 MICROPROCESSOR INTERFACE TIMING - MOTOROLA ASYNCHRONOUS (68K) MODE...................... 314 FIGURE 57. MOTOROLA-ASYNCHRONOUS MODE TIMING - WRITE OPERATION................................................................................ 314 TABLE 283 MOTOROLA (68K) ASYNCHRONOUS MODE TIMING INFORMATION - WRITE OPERATION .................................................. 314 7.2.1 MOTOROLA-ASYNCHRONOUS MODE TIMING - READ OPERATION.................................................................. 315 FIGURE 58. MOTOROLA-ASYNCHRONOUS MODE TIMING - READ OPERATION ................................................................................. 315 TABLE 284 MOTOROLA (68K) ASYNCHRONOUS MODE TIMING - READ OPERATION ........................................................................ 315 7.3 POWERPC 403 SYNCHRONOUS MODE:...................................................................................................... 316 FIGURE 59. POWERPC 403 MODE TIMING - WRITE OPERATION .................................................................................................... 316 TABLE 285 POWER PC403 MODE TIMING - WRITE OPERATION ..................................................................................................... 316 FIGURE 60. POWERPC 403 MODE TIMING - READ OPERATION ..................................................................................................... 317 |
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Similar Description - XRT86SH221_08 |
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