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XRT86SH328 Datasheet(PDF) 11 Page - Exar Corporation |
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XRT86SH328 Datasheet(HTML) 11 Page - Exar Corporation |
11 / 119 page XRT86SH328 9 REV. 1.0.1 VOYAGER - T1 FRAMER + LIU REGISTER DESCRIPTION 1.0 REGISTER DESCRIPTIONS - T1 MODE TABLE 2: CLOCK SELECT REGISTER (CSR) HEX ADDRESS: 0XN100 BIT FUNCTION TYPE DEFAULT DESCRIPTION-OPERATION 7 LCV Insert R/W 0 Line Code Violation Insertion This bit is used to force a Line Code Violation (LCV) on the transmit output. A “0” to “1” transition on this bit will cause a single LCV to be inserted on the transmit output. 6 Set T1 Mode R/W 0 T1/E1 Mode select This bit is used to program the individual channel to operate in either T1 or E1 mode. 0 = Configures the selected channel to operate in E1 mode. 1 = Configures the selected channel to operate in T1 mode. 5 Sync All Transmit- ters to 8kHz R/W 0 Sync All Transmit Framers to 8kHz This bit permits the user to configure each of the 56 Transmit T1 Framer blocks to synchronize their “transmit output” frame alignment with the 8kHz signal that is derived from the MCLK PLL, as described below. 0 - Disables the “Sync all Transmit Framers to 8kHz” feature for all channels. 1 - Enables the “Sync all Transmit Framers to 8kHz” feature for all channels. NOTE: Writing to this bit in register 0x0100 will enable this feature for all channels. NOTE: This bit is only active if the MCLK PLL is used as the “Timing Source” for the Transmit T1 Framer” blocks. CSS[1:0] of this register allows users to select the transmit source of the framer. 4:2 Reserved R/W 00 Reserved |
Similar Part No. - XRT86SH328_3 |
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Similar Description - XRT86SH328_3 |
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