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M52D16161A Datasheet(PDF) 6 Page - Elite Semiconductor Memory Technology Inc.

Part # M52D16161A
Description  512K x 16Bit x 2Banks Mobile Synchronous DRAM
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Manufacturer  ESMT [Elite Semiconductor Memory Technology Inc.]
Direct Link  http://www.esmt.com.tw/index.asp
Logo ESMT - Elite Semiconductor Memory Technology Inc.

M52D16161A Datasheet(HTML) 6 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M52D16161A
Elite Semiconductor Memory Technology Inc.
Publication Date : May 2009
Revision : 1.7
6/32
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
-10
-15
Parameter
Symbol
Min
Max
Min
Max
Unit
Note
CAS Latency =3
10
15
CLK cycle time
CAS Latency =2
tCC
15
1000
15
1000
ns
1
CAS Latency =3
-
9
-
12
CLK to valid
output delay
CAS Latency =2
tSAC
-
12
-
12
ns
1
Output data hold time
tOH
2.5
-
2.5
-
ns
2
CLK high pulse width
tCH
3
-
3
-
ns
3
CLK low pulse width
tCL
3
-
3
-
ns
3
Input setup time
tSS
3
-
4
-
ns
3
Input hold time
tSH
1
-
2
-
ns
3
CLK to output in Low-Z
tSLZ
1
-
1
-
ns
2
CAS Latency =3
-
7
-
9
CLK to output in
Hi-Z
CAS Latency =2
tSHZ
-
8
-
9
ns
-
*All AC parameters are measured from half to half.
Note: 1.Parameters depend on programmed CAS latency.
2.If clock rising time is longer than 1ns,(tr/2-0.5)ns should be added to the parameter.
3.Assumed input rise and fall time (tr & tf)=1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered, i.e., [(tr+ tf)/2-1]ns should be added to the
parameter.


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