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M24L816512SA-55TEG Datasheet(PDF) 6 Page - Elite Semiconductor Memory Technology Inc.

Part # M24L816512SA-55TEG
Description  8-Mbit (512K x 16) Pseudo Static RAM
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Manufacturer  ESMT [Elite Semiconductor Memory Technology Inc.]
Direct Link  http://www.esmt.com.tw/index.asp
Logo ESMT - Elite Semiconductor Memory Technology Inc.

M24L816512SA-55TEG Datasheet(HTML) 6 Page - Elite Semiconductor Memory Technology Inc.

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ESMT
M24L816512SA
Elite Semiconductor Memory Technology Inc.
Publication Date : Jun. 2009
Revision : 1.5
6/14
Switching Characteristics (Over the Operating Range) (continued)[10, 11, 12, 13, 14]
-55
-70
Parameter
Description
Min.
Max.
Min.
Max.
Unit
Write Cycle[13]
tWC
Write Cycle Time
55
70
ns
tSCE
CE LOW to Write End
45
55
ns
tAW
Address Set-up to Write End
45
55
ns
tHA
Address Hold from Write End
0
0
ns
tSA
Address Set-up to Write Start
0
0
ns
tPWE
WE
Pulse Width
40
55
ns
tBW
BLE
/ BHE LOW to Write End
50
55
ns
tSD
Data Set-up to Write End
42
42
ns
tHD
Data Hold from Write End
0
0
ns
tHZWE
WE
LOW to High-Z[11, 12]
25
25
ns
tLZWE
WE HIGH to Low-Z[11, 12]
5
5
ns
Switching Waveforms
Read Cycle 1 (Address Transition Controlled)[14, 15, 16]
Read Cycle 2 (
OE Controlled)[14, 15]
Notes:
15. WE is HIGH for Read Cycle.
16. Device is continuously selected. OE , CE = VIL


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