P r o d u c t I n n o v a t i o n F r o m

PA03 • PA03A

PA02U

5

4

3

0 = OPERATE

1 = SHUT DN

500Ω

Q14

Q22

1K

1K

*

+5V

500Ω

PA03

* NOT REQUIRED

WHEN USING

CMOS LOGIC

FIGURE 1a.

DIRECT DRIVE

OF SHUTDOWN

3

0 = SHUT DN

1 = OPERATE

500Ω

Q14

Q22

1K

R

+15V

500Ω

PA03

FIGURE 1b.

HIGH VOLTAGE

LOGIC INTERFACE

CMOS

4

4

3

500Ω

Q14

Q22

1K

R1

**

500Ω

PA03

FIGURE 1c.

THERMALLY

ACTIVATED

SHUTDOWN

R2

4.7K

LOAD

R4

30K

R3

360Ω

360–

400mV

THERMAL SENSE

TRANSISTOR

+VS

2R

** SELECT SHUTOFF

TEMPERATURE

SELECT R4 FOR 5V

DROP ON R2

At a gain of 3:

1. Connect a 470pF compensation capacitor between

pins 9 and 10.

2. Typical slew rate will be 5V/µs.

3. Typical phase margin will be 45°.

At unity gain:

1. Connect a 1.8nF compensation capacitor between

pins 9 and 10.

2. Typical slew rate will be 1.8V/µs.

3. Typical phase margin will be 65°.

ContACting CiRRUs LogiC sUPPoRt

For all Apex Precision Power product questions and inquiries, call toll free 800-546-2739 in North America.

For inquiries via email, please contact apex.support@cirrus.com.

International customers can also request support by contacting their local Cirrus Logic Sales Representative.

To find the one nearest to you, go to www.cirrus.com

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