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LP78086 Datasheet(PDF) 7 Page - Lowpower Semiconductor inc

Part # LP78086
Description  650mA High Efficiency Synchronous Buck with Dual Channel LDO
Download  9 Pages
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Manufacturer  POWER [Lowpower Semiconductor inc]
Direct Link  http://www.lowpowersemi.com
Logo POWER - Lowpower Semiconductor inc

LP78086 Datasheet(HTML) 7 Page - Lowpower Semiconductor inc

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Preliminary
Datasheet
LP78086
LP78086 –00 Ver. 1.0 Datasheet
Feb.-2008
Page 7 of 9
efficiency and which change would produce the most
improvement efficiency can be expressed as :
Efficiency= 100%- (L1+L2+L3…)
Where L1、L2, etc. are the individual losses as a percentage of
Input power .although all dissipative elements in the for most
of losses: VIN quiescent current and 12R loss dominates the
efficiency loss at medium to high load currents. In a typical
efficiency plot, the efficiency curve at very low load currents
can be misleading since the actual power lost is of no
consequence.
1.The VIN quiescent current is due to two components:
the DC Bias current as given in the electrical
characteristics and the Internal main switch and
synchronous switch gate charge currents. the gate
charge current results from switching the gate
capacitance
of
the
internal
power
MOSFET
switches .Each time the gate charge current.results
from switching the gate capacitance of the internal
power MOSFET switches. Each time the gate is
switches from high to low to high again, a packet of
charge △Q moves from VIN to ground.
The resulting △Q/△t is the current out of VIN that is typically
larger than the DC bias current. In continuous mode.
LGATCHG=f(QT+QB)
Where QT and QB are the gate charges of the internal top and
bottom switches. Both the DC bias and gate charge losses are
proportional to VIN and thus their effects will be more
pronounced at higher supply voltages.
2. 12Rlosses tae calculated from the resistances of the internal
switches, RSW and external inductor RL. in continuous mode
the average output current flowing through inductor L is
“chopped” between the main switch and the synchronous
switch. Thus, the series resistance looking into the LX pin is a
function of both top and bottom MOSFER RDS(ON) and the duty
cycle (DC) as follows:
RSW=RDS(ON)TOP×DC+RDS(ON)BOT×(1-DC)
The RDS(ON) for both the top and bottom MOSFETS can be
obtained from the typical performance characteristics curves.
thus, to obtain 12R losses, simply add RSW to RL and multiply
the square of the average output current.
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for
less than 2% of the total loss.


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