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EBE21FE8ACFR-6E-E Datasheet(PDF) 3 Page - Elpida Memory

Part # EBE21FE8ACFR-6E-E
Description  2GB Fully Buffered DIMM
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EBE21FE8ACFR-6E-E Datasheet(HTML) 3 Page - Elpida Memory

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EBE21FE8ACFR
Data Sheet E1345E20 (Ver. 2.0)
3
Advanced Memory Buffer Overview
The Advanced Memory Buffer (AMB) reference design complies with the FB-DIMM Architecture and Protocol
Specification. It supports DDR2 SDRAM main memory. The AMB allows buffering of memory traffic to support large
memory capacities. All memory control for the DRAM resides in the host, including memory request initiation, timing,
refresh, scrubbing, sparing, configuration access, and power management. The AMB interface is responsible for
handling FB-DIMM channel and memory requests to and from the local DIMM and for forwarding requests to other
DIMMs on the FB-DIMM channel.
The FB-DIMM provides a high memory bandwidth, large capacity channel solution that has a narrow host interface.
FB-DIMMs use commodity DRAMs isolated from the channel behind a buffer on the DIMM. The memory capacity is
288 devices per channel and total memory capacity scales with DRAM bit density.
The AMB is the buffer that isolates the DRAMs from the channel.
Advanced Memory Buffer Functionality
The AMB will perform the following FB-DIMM channel functions.
• Supports channel initialization procedures as defined in the initialization chapter of the FB-DIMM Architecture and
Protocol Specification to align the clocks and the frame boundaries, verify channel connectivity, and identify AMB
DIMM position.
• Supports the forwarding of southbound and northbound frames, servicing requests directed to a specific AMB or
DIMM, as defined in the protocol chapter, and merging the return data into the northbound frames.
• If the AMB resides on the last DIMM in the channel, the AMB initializes northbound frames.
• Detects errors on the channel and reports them to the host memory controller.
• Support the FB-DIMM configuration register set as defined in the register chapters.
• Acts as DRAM memory buffer for all read, write, and configuration accesses addressed to the DIMM.
• Provides a read buffer FIFO and a write buffer FIFO.
• Supports an SMBus protocol interface for access to the AMB configuration registers.
• Provides logic to support MemBIST and IBIST design for test functions.
• Provides a register interface for the thermal sensor and status indicator.
• Functions as a repeater to extend the maximum length of FB-DIMM links.


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