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EDJ1108BDSE Datasheet(PDF) 5 Page - Elpida Memory

Part # EDJ1108BDSE
Description  1G bits DDR3 SDRAM
Download  147 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDJ1108BDSE Datasheet(HTML) 5 Page - Elpida Memory

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EDJ1104BDSE, EDJ1108BDSE
Preliminary Data Sheet E1494E50 (Ver. 5.0)
5
DDR3 SDRAM Mode Register 1 [MR1] ...................................................................................................... 77
DDR3 SDRAM Mode Register 2 [MR2] ...................................................................................................... 78
DDR3 SDRAM Mode Register 3 [MR3] ...................................................................................................... 79
Burst Length (MR0) .................................................................................................................................... 80
Burst Type (MR0) ....................................................................................................................................... 80
DLL Enable (MR1) ...................................................................................................................................... 81
DLL-off Mode .............................................................................................................................................. 81
DLL on/off switching procedure .................................................................................................................. 82
Additive Latency (MR1)............................................................................................................................... 84
Write Leveling (MR1) .................................................................................................................................. 85
TDQS, /TDQS function (MR1) .................................................................................................................... 88
Extended Temperature Usage (MR2) ......................................................................................................... 89
Multi Purpose Register (MR3)..................................................................................................................... 91
Operation of the DDR3 SDRAM..................................................................................................................98
Read Timing Definition................................................................................................................................ 98
Read Operation ........................................................................................................................................ 102
Write Timing Definition.............................................................................................................................. 109
Write Operation......................................................................................................................................... 110
Write Timing Violations ............................................................................................................................. 116
Write Data Mask ....................................................................................................................................... 117
Precharge ................................................................................................................................................. 118
Auto Precharge Operation ........................................................................................................................ 119
Auto-Refresh............................................................................................................................................. 120
Self-Refresh.............................................................................................................................................. 121
Power-Down Mode ................................................................................................................................... 122
Input Clock Frequency Change during Precharge Power-Down............................................................... 129
On-Die Termination (ODT)........................................................................................................................ 130
ZQ Calibration........................................................................................................................................... 142
Package Drawing ......................................................................................................................................144
78-ball FBGA ............................................................................................................................................ 144
Recommended Soldering Conditions........................................................................................................145


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