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EBE11FD8AJFT-6E-E Datasheet(PDF) 7 Page - Elpida Memory

Part # EBE11FD8AJFT-6E-E
Description  1GB Fully Buffered DIMM
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EBE11FD8AJFT-6E-E Datasheet(HTML) 7 Page - Elpida Memory

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EBE11FD8AJFT
Data Sheet E1088E30 (Ver. 3.0)
7
Block Diagram
DQS9
/DQS0
DQ0 to DQ7
8
D1
/CS0
/CS1
/CS DQS
DQ0
to DQ7
DQS0
DQ8 to DQ15
8
DQS1
/DQS1
/DQS
D0
DM/
RDQS
DQS
NU/
/RDQS
NU/
/RDQS
DQ0
to DQ7
/DQS
/CS
DM/
RDQS
DQS10
DQS11
/DQS2
DQ16 to DQ23
8
D3
/CS DQS
DQ0
to DQ7
DQS2
DQ24 to DQ31
8
DQS3
/DQS3
/DQS
D2
DM/
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
DM/
RDQS
DQS12
DQS13
/DQS4
DQ32 to DQ39
8
DQS4
DQ40 to DQ47
8
DQS5
/DQS5
DQS14
DQS15
/DQS6
DQ48 to DQ55
8
DQS6
DQ56 to DQ63
8
DQS7
/DQS7
DQS16
CB0 to CB7
8
DQS8
/DQS8
DQS17
All address/command/control/clock
PN0 to PN13
/PN0 to /PN13
PS0 to PS9
/PS0 to /PS9
Notes:
1. DQ wiring may be changed within a byte.
2. There are two physical copies of each address/command/control/clock
SN0 to SN13
/SN0 to /SN13
SS0 to SS9
/SS0 to /SS9
VTT
SDA
SDA
SCL
SCL
Serial PD
WP A0 A1 A2
SA0 SA1 SA2
U0
VTT
VCC
VDD
VREF
VSS
VDDSPD
Terminators
AMB
D0 to D17, AMB
D0 to D17
D0 to D17, SPD, AMB
SPD, AMB
NU/
/RDQS
NU/
/RDQS
D10
/CS DQS
DQ0
to DQ7
/DQS
D9
DM/
RDQS
DQS
NU/
/RDQS
NU/
/RDQS
DQ0
to DQ7
/DQS
/CS
DM/
RDQS
D12
/CS DQS
DQ0
to DQ7
/DQS
D11
DM/
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
DM/
RDQS
NU/
/RDQS
NU/
/RDQS
D5
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
D6
DM/
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
NU/
/RDQS
D7
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
D8
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
D13
DM/
D4
DM/
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
NU/
/RDQS
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
NU/
/RDQS
D14
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
D15
DM/
RDQS
DQS
DQ0
to DQ7
/DQS
/CS
NU/
/RDQS
D16
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
D17
/CS DQS
DQ0
to DQ7
/DQS
DM/
RDQS
NU/
/RDQS
/CS0 -> /CS (D0 to D8)
CKE0 -> CKE (D0 to D8)
/CS1 -> /CS (D9 to D17)
CKE1 -> CKE (D9 to D17)
ODT -> ODT (all SDRAMs)
BA0, BA1 (all SDRAMs)
A0 to A13 (all SDRAMs)
/RAS (all SDRAMs)
/CAS (all SDRAMs)
/WE (all SDRAMs)
CK/ /CK
DQ0 to DQ63
CB0 to CB7
DQS0 to DQS17
/DQS0 to /DQS8
SCL
SDA
SA1 to SA2
/RESET
SCK/ /SCK
* D0 to D17 : 512M bits DDR2 SDRAM
U0 : 256 bytes EEPROM
SA0
A
M
B


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