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EDJ1108BASE-DJ-E Datasheet(PDF) 5 Page - Elpida Memory |
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EDJ1108BASE-DJ-E Datasheet(HTML) 5 Page - Elpida Memory |
5 / 148 page EDJ1104BASE, EDJ1108BASE, EDJ1116BASE Data Sheet E1128E60 (Ver. 6.0) 5 CONTENTS Specifications.................................................................................................................................................1 Features.........................................................................................................................................................1 Ordering Information......................................................................................................................................2 Part Number ..................................................................................................................................................2 Pin Configurations ( ×4, ×8 configuration) ......................................................................................................3 Pin Configurations ( ×16 configuration) ..........................................................................................................4 Electrical Conditions ......................................................................................................................................7 Absolute Maximum Ratings .......................................................................................................................... 7 Operating Temperature Condition ................................................................................................................ 7 Recommended DC Operating Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................... 8 AC and DC Input Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V)....................... 8 VREF Tolerances ......................................................................................................................................... 9 Input Slew Rate Derating ............................................................................................................................ 10 AC and DC Logic Input Levels for Differential Signals................................................................................ 16 AC and DC Output Measurement Levels (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) .................. 21 AC Overshoot/Undershoot Specification..................................................................................................... 23 Output Driver Impedance............................................................................................................................ 24 On-Die Termination (ODT) Levels and I-V Characteristics .........................................................................26 ODT Timing Definitions............................................................................................................................... 28 IDD Measurement Conditions (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................... 32 Electrical Specifications...............................................................................................................................43 DC Characteristics 1 (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................................. 43 DC Characteristics 2 (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V) ................................................. 44 Pin Capacitance (TC = 25 °C, VDD, VDDQ = 1.5V ± 0.075V)..................................................................... 45 Standard Speed Bins.................................................................................................................................. 46 AC Characteristics (TC = 0 °C to +85°C, VDD, VDDQ = 1.5V ± 0.075V, VSS, VSSQ = 0V)....................... 50 Block Diagram .............................................................................................................................................63 Pin Function.................................................................................................................................................64 Command Operation ...................................................................................................................................66 Command Truth Table................................................................................................................................ 66 CKE Truth Table ......................................................................................................................................... 70 Simplified State Diagram .............................................................................................................................71 RESET and Initialization Procedure ............................................................................................................72 Power-Up and Initialization Sequence ........................................................................................................ 72 Reset and Initialization with Stable Power .................................................................................................. 73 Programming the Mode Register.................................................................................................................74 Mode Register Set Command Cycle Time (tMRD) .....................................................................................74 MRS Command to Non-MRS Command Delay (tMOD) ............................................................................. 74 DDR3 SDRAM Mode Register 0 [MR0] ...................................................................................................... 75 |
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