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EDE2516AEBG Datasheet(PDF) 8 Page - Elpida Memory |
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EDE2516AEBG Datasheet(HTML) 8 Page - Elpida Memory |
8 / 77 page EDE2508AEBG, EDE2516AEBG Data Sheet E1175E20 (Ver. 2.0) 8 DC Characteristics 1 (TC = 0 °C to +85°C, VDD, VDDQ = 1.8V ± 0.1V) ×8 ×16 Parameter Symbol Grade max. max. Unit Test condition Operating current (ACT-PRE) IDD0 -8E -6E 55 50 55 50 mA one bank; tCK = tCK (IDD), tRC = tRC (IDD), tRAS = tRAS min.(IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING Operating current (ACT-READ-PRE) IDD1 -8E -6E 65 60 65 60 mA one bank; IOUT = 0mA; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRC = tRC (IDD), tRAS = tRAS min.(IDD); tRCD = tRCD (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data pattern is same as IDD4W Precharge power- down standby current IDD2P -8E -6E 4 4 4 4 mA all banks idle; tCK = tCK (IDD); CKE is L; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING Precharge quiet standby current IDD2Q -8E -6E 12 12 12 12 mA all banks idle; tCK = tCK (IDD); CKE is H, /CS is H; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING Idle standby current IDD2N -8E -6E 15 15 15 15 mA all banks idle; tCK = tCK (IDD); CKE is H, /CS is H; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING IDD3P-F -8E -6E 15 15 15 15 mA Fast PDN Exit MRS(12) = 0 Active power-down standby current IDD3P-S -8E -6E 12 12 12 12 mA all banks open; tCK = tCK (IDD); CKE is L; Other control and address bus inputs are STABLE; Data bus inputs are FLOATING Slow PDN Exit MRS(12) = 1 Active standby current IDD3N -8E -6E 40 35 40 35 mA all banks open; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING Operating current (Burst read operating) IDD4R -8E -6E 135 125 150 135 mA all banks open, continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data pattern is same as IDD4W Operating current (Burst write operating) IDD4W -8E -6E 115 115 150 135 mA all banks open, continuous burst writes; BL = 4, CL = CL(IDD), AL = 0; tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD); CKE is H, /CS is H between valid commands; Address bus inputs are SWITCHING; Data bus inputs are SWITCHING |
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