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EDE2108ABSE Datasheet(PDF) 10 Page - Elpida Memory

Part # EDE2108ABSE
Description  2G bits DDR2 SDRAM
Download  81 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

EDE2108ABSE Datasheet(HTML) 10 Page - Elpida Memory

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EDE2104ABSE, EDE2108ABSE
Data Sheet E1196E30 (Ver. 3.0)
10
AC Timing for IDD Test Conditions
For purposes of IDD testing, the following parameters are to be utilized.
DDR2-800
DDR2-667
DDR2-533
Parameter
6-6-6
5-5-5
4-4-4
Unit
CL (IDD)
6
5
4
tCK
tRCD (IDD)
15
15
15
ns
tRC (IDD)
60
60
60
ns
tRRD (IDD)
7.5
7.5
7.5
ns
tFAW (IDD)
35
37.5
37.5
ns
tCK (IDD)
2.5
3
3.75
ns
tRAS (min.)(IDD)
45
45
45
ns
tRAS (max.)(IDD)
70000
70000
70000
ns
tRP (IDD)
15
15
15
ns
tRFC (IDD)
195
195
195
ns
IDD7 Timing Patterns for 8 Banks
The detailed timings are shown in the IDD7 Timing Patterns for 8 Banks tables.
Speed bins
Timing Patterns
DDR2-533
A0 RA0 A1 RA1 A2 RA2 A3 RA3 D D A4 RA4 A5 RA5 A6 RA6 A7 RA7 D D
DDR2-667
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D
DDR2-800
A0 RA0 D A1 RA1 D A2 RA2 D A3 RA3 D D D A4 RA4 D A5 RA5 D A6 RA6 D A7 RA7 D D D
Remark: A = Active. RA = Read with auto precharge. D = Deselect
Notes: 1. All banks are being interleaved at minimum tRC (IDD) without violating tRRD (IDD) and tFAW (IDD) using
a Burst length = 4.
2. Control and address bus inputs are STABLE during DESELECTs.
3. IOUT = 0mA.


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