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EDD5116AFTA-6BH-E Datasheet(PDF) 7 Page - Elpida Memory |
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EDD5116AFTA-6BH-E Datasheet(HTML) 7 Page - Elpida Memory |
7 / 52 page EDD5116AFTA-H Preliminary Data Sheet E0957E30 (Ver. 3.0) 7 Notes: 1. These IDD data are measured under condition that DQ pins are not connected. 2. One bank operation. 3. One bank active. 4. All banks idle. 5. Command/Address transition once per one clock cycle. 6. DQ, DM and DQS transition twice per one clock cycle. 7. 4 banks active. Only one bank is running at tRC = tRC (min.) 8. The IDD data on this table are measured with regard to tCK = tCK (min.) in general. 9. Command/Address transition once every two clock cycle. 10. Command/Address stable at ≥ VIH or ≤ VIL. DC Characteristics 2 (TA = 0°C to +70 °C, VDD, VDDQ = 2.6V ± 0.1V, VSS, VSSQ = 0V) [DDR400] (TA = 0°C to +70 °C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V) [DDR333] Parameter Symbol min. max. Unit Test condition Notes Input leakage current ILI –2 2 µA VDD ≥ VIN ≥ VSS Output leakage current ILO –5 5 µA VDDQ ≥ VOUT ≥ VSS Output high current IOH –15.2 — mA VOUT = 1.95V Output low current IOL 15.2 — mA VOUT = 0.35V Pin Capacitance (TA = +25°C, VDD, VDDQ = 2.6V ± 0.1V, VSS, VSSQ = 0V) [DDR400] (TA = +25°C, VDD, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V) [DDR333] Parameter Symbol Pins min. typ. max. Unit Notes Input capacitance CI1 CK, /CK 2.0 — 3.0 pF 1 CI2 All other input pins 2.0 — 3.0 pF 1 Delta input capacitance Cdi1 CK, /CK — — 0.25 pF 1 Cdi2 All other input-only pins — — 0.5 pF 1 Data input/output capacitance CI/O DQ, DM, DQS 4.0 — 5 pF 1, 2 Delta input/output capacitance Cdio DQ, DM, DQS — — 0.5 pF 1 Notes: 1. These parameters are measured on conditions: f = 100MHz, VOUT = VDDQ/2, ΔVOUT = 0.2V. 2. DOUT circuits are disabled. |
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