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EDS2508ADTA-75-E Datasheet(PDF) 11 Page - Elpida Memory |
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EDS2508ADTA-75-E Datasheet(HTML) 11 Page - Elpida Memory |
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11 / 50 page  EDS2508ADTA Prelimimary Data Sheet E0633E10 (Ver. 1.0) 11 Pin Function CLK (input pin) CLK is the master clock input. Other inputs signals are referenced to the CLK rising edge. CKE (input pins) CKE determine validity of the next CLK (clock). If CKE is high, the next CLK rising edge is valid; otherwise it is invalid. If the CLK rising edge is invalid, the internal clock is not issued and the Synchronous DRAM suspends operation. When the Synchronous DRAM is not in burst mode and CKE is negated, the device enters power down mode. During power down mode, CKE must remain low. /CS (input pins) /CS low starts the command input cycle. When /CS is high, commands are ignored but operations continue. /RAS, /CAS, and /WE (input pins) /RAS, /CAS and /WE have the same symbols on conventional DRAM but different functions. For details, refer to the command table. A0 to A12 (input pins) Row address (AX0 to AX12) is determined by A0 to A12 at the bank active command cycle CLK rising edge. Column address is determined by A0 to A9 (see Address Pins Table) at the read or write command cycle CLK rising edge. And this column address becomes burst access start address. [Address Pins Table] Address (A0 to A12) Part number Row address Column address EDS2508AD AX0 to AX12 AY0 to AY9 A10 defines the precharge mode. When A10 = High at the precharge command cycle, all banks are precharged. But when A10 = Low at the precharge command cycle, only the bank that is selected by BA0 and BA1 (BS) is precharged. For details refer to the command operation section. BA0 and BA1 (input pin) BA0 and BA1 are bank select signal. (See Bank Select Signal Table) [Bank Select Signal Table] BA0 BA1 Bank 0 L L Bank 1 H L Bank 2 L H Bank 3 H H Remark: H: VIH. L: VIL. CKE (input pin) This pin determines whether or not the next CLK is valid. If CKE is High, the next CLK rising edge is valid. If CKE is Low, the next CLK rising edge is invalid. This pin is used for power-down mode, clock suspend mode and self refresh mode. |
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