EBE51UD8ABFV datasheet(11/22 Pages) ELPIDA

Part #	EBE51UD8ABFV

Description	512MB Unbuffered DDR2 SDRAM HYPER DIMM?

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Manufacturer	ELPIDA [Elpida Memory]

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EBE51UD8ABFV

Preliminary Data Sheet E0528E12 (Ver. 1.2)

11

DC Characteristics 1 (TC = 0 to +85°C, VDD = 1.85V ± 0.05V, VSS = 0V)

Parameter

Symbol

Grade

max.

Unit

Test condition

-BE

1000

Operating current

(ACT-PRE)

IDD0

-AE

960

mA

one bank; tCK = tCK (IDD), tRC = tRC (IDD),

tRAS = tRAS min.(IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-BE

1120

Operating current

(ACT-READ-PRE)

IDD1

-AE

1080

mA

one bank; IOUT = 0mA;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD), tRC = tRC (IDD),

tRAS = tRAS min.(IDD); tRCD = tRCD (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data pattern is same as IDD4W

-BE

96

Precharge power-down

standby current

IDD2P

-AE

88

mA

all banks idle;

tCK = tCK (IDD);

CKE is L;

Other control and address bus inputs are STABLE;

Data bus inputs are FLOATING

-BE

240

Precharge quiet standby

current

IDD2Q

-AE

200

mA

all banks idle;

tCK = tCK (IDD);

CKE is H, /CS is H;

Other control and address bus inputs are STABLE;

Data bus inputs are FLOATING

-BE

320

Idle standby current

IDD2N

-AE

280

mA

all banks idle;

tCK = tCK (IDD);

CKE is H, /CS is H;

Other control and address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-BE

360

IDD3P-F

-AE

320

mA

Fast PDN Exit

MRS(12) = 0

-BE

240

Active power-down

standby current

IDD3P-S

-AE

200

mA

all banks open;

tCK = tCK (IDD);

CKE is L;

Other control and address bus

inputs are STABLE;

Data bus inputs are FLOATING

Slow PDN Exit

MRS(12) = 1

-BE

640

Active standby current

IDD3N

-AE

600

mA

all banks open;

tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Other control and address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

-BE

1760

Operating current

(Burst read operating)

IDD4R

-AE

1680

mA

all banks open, continuous burst reads, IOUT = 0mA;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data pattern is same as IDD4W

-BE

1760

Operating current

(Burst write operating)

IDD4W

-AE

1680

mA

all banks open, continuous burst writes;

BL = 4, CL = CL(IDD), AL = 0;

tCK = tCK (IDD), tRAS = tRAS max.(IDD), tRP = tRP (IDD);

CKE is H, /CS is H between valid commands;

Address bus inputs are SWITCHING;

Data bus inputs are SWITCHING

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