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EBR51UC8ABFD Datasheet(PDF) 4 Page - Elpida Memory |
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EBR51UC8ABFD Datasheet(HTML) 4 Page - Elpida Memory |
4 / 12 page EBR51UC8ABFD Data Sheet E0316E21 (Ver. 2.1) 4 Module Connector Pad Description Signal Module Connector Pads I/O Type Description GND A1, A3, A5, A7, A9, A11, A13, A15, A17, A19, A21, A23, A25, A27, A29, A31, A33, A39, A52, A60, A62, A64, A66, A68, A70, A72, A74, A76, A78, A80, A82, A84, A86, A88, A90, A92, B1, B3, B5, B7, B9, B11, B13, B15, B17, B19, B21, B23, B25, B27, B29, B31, B33, B39, B52, B60, B62, B64, B66, B68, B70, B72, B74, B76, B78, B80, B82, B84, B86, B88, B90, B92 — — Ground reference for RDRAM core and interface. 72 PCB connector pads. LCFM B10 I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. LCFMN B12 I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. LCMD B34 I VCMOS Serial Command used to read from and write to the control registers. Also used for power management. LCOL4..LCOL0 A20, B20, A22, B22, A24 I RSL Column bus. 5-bit bus containing control and address information for column accesses. LCTM A14 I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. LCTMN A12 I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. LDQA8..LDQA0 A2, B2,A4, B4, A6, B6, A8, B8, A10 I/O RSL Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LDQB8..LDQB0 B32, A32, B30, A30, B28, A28, B26, A26, B24 I/O RSL Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. LROW2..LROW0 B16, A18, B18 I RSL Row bus. 3-bit bus containing control and address information for row accesses. LSCK A34 I VCMOS Serial clock input. Clock source used to read from and write to the RDRAM control registers. NC A16, B14, A38, B38, A40, B40, A77, B79, A43, B43, A44, B44, A45, B45, A46, B46, A47, B47, A48, B48, A49, B49, A50, B50 — — These pads are not connected. These 24 connector pads are reserved for future use. RCFM B83 I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Positive polarity. RCFMN B81 I RSL Clock from master. Interface clock used for receiving RSL signals from the Channel. Negative polarity. RCMD B59 I VCMOS Serial Command Input used to read from and write to the control registers. Also used for power management. RCOL4..RCOL0 A73, B73, A71, B71, A69 I RSL Column bus. 5-bit bus containing control and address information for column accesses. RCTM A79 I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Positive polarity. RCTMN A81 I RSL Clock to master. Interface clock used for transmitting RSL signals to the Channel. Negative polarity. RDQA8..RDQA0 A91, B91, A89, B89, A87, B87, A85, B85, A83 I/O RSL Data bus A. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RDQB8..RDQB0 B61, A61, B63, A63, B65, A65, B67, A67, B69 I/O RSL Data bus B. A 9-bit bus carrying a byte of read or write data between the Channel and the RDRAM. RROW2..RROW0 B77, A75, B75 I RSL Row bus. 3-bit bus containing control and address information for row accesses. |
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