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HB52D168GB-A6BL Datasheet(PDF) 6 Page - Elpida Memory |
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HB52D168GB-A6BL Datasheet(HTML) 6 Page - Elpida Memory |
6 / 19 page HB52F168GB-B, HB52D168GB-B Data Sheet E0008H10 6 Byte No. Function described Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Hex value Comments 20 SDRAM device attributes: W latency 0000000101 0 21 SDRAM module attributes 0000000000 Unbuffer 22 SDRAM device attributes: General 000011100E V CC ± 10% 23 SDRAM cycle time (2nd highest CE latency) (-75/A6) 10 ns 10100000A0 CL = 2 (-B6) 15 ns 11110000F0 24 SDRAM access from Clock (2nd highest CE latency) (-75/A6) 6 ns 0110000060 (-B6) 8 ns 1000000080 25 SDRAM cycle time (3rd highest CE latency) Undefined 0000000000 26 SDRAM access from Clock (3rd highest CE latency) Undefined 0000000000 27 Minimum row precharge time 0001010014 20 ns 28 Row active to row active min (-75) 000011110F 15 ns (-A6/B6) 0001010014 20 ns 29 RE to CE delay min 0001010014 20 ns 30 Minimum RE pulse width (-75) 001011012D 45 ns (-A6/B6) 0011001032 50 ns 31 Density of each bank on module 0010000020 128M byte 32 Address and command signal input setup time (-75) 0001010115 1.5 ns (-A6/B6) 0010000020 2.0 ns 33 Address and command signal input hold time (-75) 0000100008 0.8 ns (-A6/B6) 0001000010 1.0 ns 34 Data signal input setup time (-75) 0001010115 1.5 ns (-A6/B6) 0010000020 2.0 ns |
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