PESD5V0L6UAS_US_3

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 03 — 18 August 2009

8 of 14

NXP Semiconductors

PESD5V0L6UAS; PESD5V0L6US

Low capacitance 6-fold ESD protection diode arrays

7.

Application information

The PESD5V0L6UAS and the PESD5V0L6US are designed for protection of up to six

unidirectional data lines from the damage caused by ElectroStatic Discharge (ESD) and

surge pulses. The PESD5V0L6UAS and the PESD5V0L6US may be used on lines where

the signal polarity is above or below ground.

The PESD5V0L6UAS and the PESD5V0L6US provide a surge capability of 35 W per line

for a 8/20

µs waveform.

Circuit board layout and protection device placement:

Circuit board layout is critical for the suppression of ESD, EFT and surge transients. The

following guidelines are recommended:

1. Place the protection device as close to the input terminal or connector as possible.

2. The path length between the protection device and the protected line should be

minimized.

3. Keep parallel signal paths to a minimum.

4. Avoid running protection conductors in parallel with unprotected conductor.

5. Minimize all printed-circuit board conductive loops including power and ground loops.

6. Minimize the length of the transient return path to ground.

7. Avoid using shared transient return paths to a common ground point.

8. Ground planes should be used whenever possible. For multilayer printed-circuit

boards, use ground vias.

Fig 8.

Typical application for ESD protection of data lines

n.c.

n.c.

006aaa065

PESD5V0L6UAS

PESD5V0L6US

PESD5V0L6UAS

PESD5V0L6US

high speed

data lines

unidirectional protection of 6 lines

bidirectional protection of 5 lines