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UJA1069TW Datasheet(PDF) 2 Page - NXP Semiconductors |
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UJA1069TW Datasheet(HTML) 2 Page - NXP Semiconductors |
2 / 64 page UJA1069_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 28 October 2009 2 of 64 NXP Semiconductors UJA1069 LIN fail-safe system basis chip 2. Features 2.1 General I Contains a full set of LIN ECU functions: N LIN transceiver N Voltage regulator for the microcontroller (5.0 V) N Enhanced window watchdog with on-chip oscillator N Serial Peripheral Interface (SPI) for the microcontroller N ECU power management system N Fully integrated autonomous fail-safe system I Designed for automotive applications: N Supports 14 V and 42 V architectures N Excellent ElectroMagnetic Compatibility (EMC) performance N ±8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) for off-board pins N ±4 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins N ±60 V short-circuit proof LIN-bus pin N Battery and LIN-bus pins are protected against transients in accordance with ISO 7637-3 N Very low sleep current I Supports remote flash programming via the LIN-bus I Available in: N Small 6.4 mm × 7.8 mm HTSSOP24 package with low thermal resistance N Small 8 mm × 11 mm HTSSOP32 package with low thermal resistance 2.2 LIN transceiver I LIN 2.0 and SAE J2602 compliant LIN transceiver I Enhanced error signalling and reporting I Downward compatible with LIN 1.3 and the TJA1020 2.3 Power management I Smart operating modes and power management modes I Cyclic wake-up capability in Standby and Sleep mode I Local wake-up input with cyclic supply feature I Remote wake-up capability via the LIN-bus I External voltage regulators can easily be incorporated in the power supply system (flexible and fail-safe) I 42 V battery related high-side switch for driving external loads such as relays and wake-up switches I Intelligent maskable interrupt output |
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