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MPXV5004GC6T1 Datasheet(PDF) 4 Page - Freescale Semiconductor, Inc |
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MPXV5004GC6T1 Datasheet(HTML) 4 Page - Freescale Semiconductor, Inc |
4 / 22 page MPXV5004G Sensors 4 Freescale Semiconductor Pressure Maximum Ratings Figure 1 shows a block diagram of the internal circuitry integrated on a pressure sensor chip. Figure 1. Integrated Pressure Sensor Schematic On-chip Temperature Compensation and Calibration The performance over temperature is achieved by integrating the shear-stress strain gauge, temperature compensation, calibration and signal conditioning circuitry onto a single monolithic chip. Figure 2 illustrates the gauge configuration in the basic chip carrier (Case 482). A fluorosilicone gel isolates the die surface and wire bonds from the environment, while allowing the pressure signal to be transmitted to the silicon diaphragm. The MPxx5004G series sensor operating characteristics are based on use of dry air as pressure media. Media, other than dry air, may have adverse effects on sensor performance and long-term reliability. Internal reliability and qualification test for dry air, and other media, are available from the factory. Contact the factory for information regarding media tolerance in your application. Figure 3 shows the recommended decoupling circuit for interfacing the output of the MPxx5004G to the A/D input of the microprocessor or microcontroller. Proper decoupling of the power supply is recommended. Typical, minimum and maximum output curves are shown for operation over a temperature range of 10 °C to 60°C using the decoupling circuit shown in Figure 3. The output will saturate outside of the specified pressure range. Figure 2. Cross-Sectional Diagram (Not to Scale) Table 2. Maximum Ratings(1) 1. Exposure beyond the specified limits may cause permanent damage or degradation to the device. Rating Symbol Value Unit Maximum Pressure (P1 > P2) PMAX 16 kPa Storage Temperature TSTG –30 to +100 °C Operating Temperature TA 0 to +85 °C VOUT VS Sensing Element GND Thin Film Temperature Compensation and Calibration Circuitry Gain Stage #2 and Ground Reference Shift Circuitry Pins 1, 5, 6, 7, and 8 are NO CONNECTS for small outline package device. 2 4 3 Fluorosilicone Gel Die Coat Wire Bond Die P1 Stainless Steel Cap Thermoplastic Case Die Bond Differential Sensing Element P2 Lead Frame |
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