MMA81XXEG

Sensors

10

Freescale Semiconductor

SECTION 3 OTP MEMORY

MMA81XXEG/MMA82XXEG family features One-Time-Programmable (OTP) memory implemented via a fuse array. OTP is

organized as an array of 96 bits which contains the trim data, configuration data, and serial number for each device. Sixteen bits

of the OTP array may be programmed by the customer through the DSI Bus.

3.1

INTERNAL REGISTER ARRAY AND OTP MEMORY

Contents of OTP memory are transferred to a set of registers following power-on reset, after which the OTP array is powered-

down. Contents of the register array are static and may be read at any time following the transfer of data from the OTP memory.

Write operations to OTP mirror registers are supported when the device is in test mode, however any data stored in the register

will be lost when the device is powered down. The mirror registers are also restored when an OTP read operation is performed.

In addition to the registers which mirror OTP memory contents, several other registers are provided. Among these are the OTP

Control Registers which controls OTP programming operations and may be used to restore the registers from the OTP memory.

Figure 3-1. OTP Interface Overview

3.2

OTP WORD ASSIGNMENT

Customer-accessible OTP bits are shown in Table 3-1. Unprogrammed OTP bits are read as logic ‘0’ values. DEVCFG1,

DEVCFG2 and registers REG-8 through REG-F are programmed by the customer. Other bits are programmed and locked during

manufacturing. There is no requirement to program any bits in DEVCFG1 or DEVCFG2 for the device to be fully operational.

Table 3-1 Customer Accessible Data

Location

Bit Function

Address

Register

7

6543210

$00

SN0

S7S6S5S4S3

S2

S1

S0

$01

SN1

S15

S14

S13

S12

S11

S10

S9

S8

$02

SN2

S23

S22

S21

S20

S19

S18

S17

S16

$03

SN3

S31

S30

S29

S28

S27

S26

S25

S24

$04

TYPE

ORDER

0

AXIS

0

0

RNG2

RNG1

RNG0

$05

RESERVED

0

000000

0

$06

DEVCFG1

Customer Defined

AT1

AT0

$07

DEVCFG2

LOCK2

PAR2

GLDE

DDIS

AD3

AD2

AD1

AD0

$08

REG-8

Customer Defined

$09

REG-9

Customer Defined

$0A

REG-A

Customer Defined

$0B

REG-B

Customer Defined

$0C

REG-C

Customer Defined

$0D

REG-D

Customer Defined

$0E

REG-E

Customer Defined

$0F

REG-F

Customer Defined

CLK

SERIAL

PERIPHERAL

INTERFACE

REGISTER

ARRAY

OTP

ARRAY

TO DIGITAL

INTERFACE