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MPC8533ECVTARXB Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc |
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MPC8533ECVTARXB Datasheet(HTML) 10 Page - Freescale Semiconductor, Inc |
10 / 116 page MPC8533E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3 10 Freescale Semiconductor Electrical Characteristics Three-speed Ethernet I/O voltage LVDD (eTSEC1) 3.3 V ± 165 mV 2.5 V ± 125 mV V4 TVDD (eTSEC3) 3.3 V ± 165 mV 2.5 V ± 125 mV PCI, DUART, PCI Express, system control and power management, I2C, and JTAG I/O voltage OVDD 3.3 V ± 165 mV V 3 Local bus I/O voltage BVDD 3.3 V ± 165 mV 2.5 V ± 125 mV 1.8 V ± 90 mV V5 Input voltage DDR and DDR2 DRAM signals MVIN GND to GVDD V2 DDR and DDR2 DRAM reference MVREF GND to GVDD/2 V 2 Three-speed Ethernet signals LVIN TVIN GND to LVDD GND to TVDD V4 Local bus signals BVIN GND to BVDD V5 PCI, Local bus, DUART, SYSCLK, system control and power management, I2C, and JTAG signals OVIN GND to OVDD V3 Junction temperature range Tj 0 to 90 °C— Notes: 1. This voltage is the input to the filter discussed in Section 21.2, “PLL Power Supply Filtering,” and not necessarily the voltage at the AVDD pin, which may be reduced from VDD by the filter. 2. Caution: MVIN must not exceed GVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 3. Caution: OVIN must not exceed OVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 4. Caution: T/LVIN must not exceed T/ LVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 5. Caution: BVIN must not exceed BVDD by more than 0.3 V. This limit may be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. Table 2. Recommended Operating Conditions (continued) Characteristic Symbol Recommended Value Unit Notes |
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