6

Data Sheet - Rev 2.1

11/2008

AWT6222

APPLICATION INFORMATION

To ensure proper performance, refer to all related

Application Notes on the ANADIGICS web site:

http://www.anadigics.com

Shutdown Mode

The power amplifier may be placed in a shutdown

mode by applying logic low levels (see Operating

Bias Modes

The power amplifier may be placed in either a Low Bias

mode or a High Bias mode by applying the appropriate

Table 6: Bias Control

The Bias Control table lists the recommended modes

necessary for this PA.

Two operating modes are available to optimize current

consumption. High Bias/High Power operating mode

power, the PAshould be “Mode Switched” to Low power

mode for lowest quiescent current consumption.

Figure 3: Application Circuit

Bias Control

1

13

11

14

12

3

4

2

GND

5

6

10

9

Bias Control

GND

GND at slug (pad)

GND

68 pF

68 pF

1000 pF

0.01 F

2.2 F

2.2 F

0.01 F

Note:

(1) Add blocking cap if DC voltage is present on input pin.

(2) 68 pF cap should be placed as close as possible to Pin 4.

(3) TRL should be short and of 50  characteristic impedance.

(4) TRL 5 should be as long as possible (minimum of 0.1  at 800 MHz) and capable of handling 750 mA current.

Optional 4.7 nH Inductor may be substituted.

8

7

GND

(1)

(1)

N/C

TRL5

TRL3

TRL1

TRL2

68 pF

TRL4

(3)

(3)

(3)

(3)

(4)

(2)

APPLICATION

LEVELS

BIAS

MODE

UMTS - low power

< +16 dBm

Low

+2.4 V

+2.4 V

3.2 - 4.2 V

> 3.2 V

UMTS - high power

> +16 dBm

High

+2.4 V

0 V

3.2 - 4.2 V

> 3.2 V

OPTIONAL - low power

< +7 dBm

Low

+2.4 V

+2.4 V

1.5 - 3.2 V

> 3.2 V

Shutdown

-

Shutdown

0 V

0 V

3.2 - 4.2 V

> 3.2 V