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IS25C32B-3ZLA3-TR Datasheet(PDF) 6 Page - Integrated Silicon Solution, Inc |
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IS25C32B-3ZLA3-TR Datasheet(HTML) 6 Page - Integrated Silicon Solution, Inc |
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6 / 15 page  6 Integrated Silicon Solution, Inc. — www.issi.com Advanced Information Rev. 00B 08/27/09 IS25C32B-Automotive Table 5. Address Key Name IS25C32B A N A 11-A0 Don't A 15-A12 Care Bits WRITE STATUS REgISTER (WRSR) This instruction lets the user choose a Block Protection setting, and set or reset the WPEN bit. The values of the other data bits incorporated into WRSR can be 0 or 1, and are not stored in the Status Register. WRSR will be ignored unless both the following are true: a) WEN = 1, due to a prior WREN instruction; and b) Hardware Write Protection is not enabled. (See Table 4 for details). Except for the RDY status, the values in the Status Register remain unchanged until the mo- ment when the write cycle is complete and the register is updated. Note: WPEN can be changed from 1 to 0 only if WP is already set High. Once completed, WEN is reset for complete chip write protection. (See Figure 5 for timing). READ DATA (READ) This instruction begins with the op-code and the 16- bit address, and causes the selected data byte to be shifted out on SO. Following this first data byte, addi- tional sequential bytes are output. If the data byte in the highest address is output, the address rolls-over to the lowest address in the array, and the output could loop indefinitely. At any time, a rising CS signal completes the operation. (See Figure 6 for timing). WRITE DATA (WRITE) The WRITE instruction begins with the op-code, the 16-bit address of the first byte to be modified, and the first data byte. Additional data bytes may be written se- quentially to the array after the first byte. Each WRITE instruction can affect the contents of a 32 byte page, but no more. The page begins at address XXXXXXXX XXX00000, and ends with XXXXXXXX XXX11111. If the last byte of the page is input, the address rolls over to the beginning of the same page. More than 32 data bytes can be input during the same instruction, but upon a completed write cycle, a page would only contain the last 32 bytes. The region of the array defined within Block Protection cannot be modified as long as that block configuration is selected. The region of the array outside the Block Protection can only be modified if Write Enable (WEN) is set to 1. Therefore, it may be necessary that a WREN instruction occur prior to WRITE. Hardware Write Pro- tection has no affect on the memory array. Once Write is completed, WEN is reset for complete chip write protection. (See Figure 7 for timing). Table 4. Write Protection WPEN WP Hardware Write WEN Inside Block Outside Block Status Register Protection (WPEN, BP1, BP0) 0 X Not Enabled 0 Read-only Read-only Read-only 0 X Not Enabled 1 Read-only Unprotected Unprotected 1 0 Enabled 0 Read-only Read-only Read-only 1 0 Enabled 1 Read-only Unprotected Read-only X 1 Not Enabled 0 Read-only Read-only Read-only X 1 Not Enabled 1 Read-only Unprotected Unprotected Note: X = Don't care bit. |
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