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IS45S16100E Datasheet(PDF) 8 Page - Integrated Silicon Solution, Inc |
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IS45S16100E Datasheet(HTML) 8 Page - Integrated Silicon Solution, Inc |
8 / 82 page IS42S16100E, IS45S16100E 8 Integrated Silicon Solution, Inc. — www.issi.com Rev. D 08/24/09 AC CHARACTERISTICS(1,2,3) -5 -6 -7 Symbol Parameter Min. Max. Min. Max. Min. Max. Units tck3 ClockCycleTime CAS Latency=3 5— 6— 7— ns tck2 CAS Latency=2 8— 8— 8— ns tac3 AccessTimeFromCLK(4) CAS Latency=3 —5 —5.5 —5.5 ns tac2 CAS Latency=2 —6 —6 —6 ns tchi CLKHIGHLevelWidth 2— 2.5— 2.5— ns tcl CLKLOWLevelWidth 2— 2.5— 2.5— ns toh3 OutputDataHoldTime CAS Latency=3 2— 2.0— 2.0— ns toh2 CAS Latency=2 2.5— 2.5— 2.5— ns tlz OutputLOWImpedanceTime 0— 0— 0— ns thz3 OutputHIGHImpedanceTime(5) CAS Latency=3 —5 —5.5 —5.5 ns thz2 CAS Latency=2 —6 —6 —6 ns tDs InputDataSetupTime 2— 2— 2— ns tDh InputDataHoldTime 1— 1— 1— ns tas AddressSetupTime 2— 2— 2— ns tah AddressHoldTime 1— 1— 1— ns tcks CKESetupTime 2— 2— 2— ns tckh CKEHoldTime 1— 1— 1— ns tcka CKEtoCLKRecoveryDelayTime 1CLK+3 — 1CLK+3 — 1CLK+3 — ns tcs CommandSetupTime(CS, RAS, CAS, WE,DQM) 2— 2— 2— ns tch CommandHoldTime(CS, RAS, CAS, WE,DQM) 1— 1— 1— ns trc CommandPeriod(REFtoREF/ACTtoACT) 50— 54— 63— ns tras CommandPeriod(ACTtoPRE) 35 100,000 36 100,000 42 100,000 ns trp CommandPeriod(PREtoACT) 15— 18— 21— ns trcD ActiveCommandToRead/WriteCommandDelayTime 15— 18— 21— ns trrD CommandPeriod(ACT[0]toACT[1]) 10— 12— 14— ns tDpl3 InputDataToPrecharge CAS Latency=3 2CLK — 2CLK— 2CLK— ns CommandDelaytime tDpl2 CAS Latency=2 2CLK — 2CLK— 2CLK— ns tDal3 InputDataToActive/Refresh CAS Latency=3 2CLK+trp — 2CLK+trp — 2CLK+trp — ns CommandDelaytime(DuringAuto-Precharge) tDal2 CAS Latency=2 2CLK+trp — 2CLK+trp — 2CLK+trp — ns txsr ExitSelf-RefreshtoActiveTime 55— 60— 70— ns tt TransitionTime 0.31.2 0.31.2 0.31.2 ns tref RefreshCycleTime(2048)fortemperatureTa ≤85oC — 32 — 32 — 32 ms tref RefreshCycleTime(2048)fortemperatureTa >85oC(A2only)6 — — — — — 16 ms Notes: 1.Whenpowerisfirstapplied,memoryoperationshouldbestarted100µsafterVDD andVDDq reach their stipulated voltages. Also note that the power-on sequencemustbeexecutedbeforestartingmemoryoperation. 2. measured with tt = 1 ns. 3.Thereferencelevelis1.4Vwhenmeasuringinputsignaltiming.RiseandfalltimesaremeasuredbetweenVih (min.)andVil (max.). 4.Accesstimeismeasuredat1.4Vwiththeloadshowninthefigurebelow. 5.Thetimethz (max.)isdefinedasthetimerequiredfortheoutputvoltagetotransitionby±200mVfromVoh (min.)orVol(max.)whenthe output is in the high impedance state. 6.Self-RefreshModeisnotsupportedforA2gradewithTa>85oC. |
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