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IS42S16400E-6TLI Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc

Part # IS42S16400E-6TLI
Description  1 Meg Bits x 16 Bits x 4 Banks (64-MBIT) SYNCHRONOUS DYNAMIC RAM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS42S16400E-6TLI Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com3
Rev. C
08/07/09
IS42S16400E
PIN FUNCTIONS
Symbol
TSOP Pin No.
Type
Function (In Detail)
A0-A11
23to26
InputPin
AddressInputs:A0-A11aresampledduringtheACTIVE
29to34
command(row-addressA0-A11)andREAD/WRITEcommand(A0-A7
22,35
withA10definingautoprecharge)toselectonelocationoutofthememoryarray
intherespectivebank.A10issampledduringaPRECHARGEcommandtodeter-
mineifallbanksaretobeprecharged(A10HIGH)orbankselectedby
BA0,BA1(LOW).Theaddressinputsalsoprovidetheop-codeduringaLOAD
MODEREGISTERcommand.
BA0,BA1
20,21
InputPin
BankSelectAddress:BA0andBA1defineswhichbanktheACTIVE,READ,WRITE
orPRECHARGEcommandisbeingapplied.
CAS
17
InputPin
CAS
, in conjunction with the RAS and WE, forms the device command. See the
"CommandTruthTable"fordetailsondevicecommands.
CKE
37
InputPin
TheCKEinputdetermineswhethertheCLKinputisenabled.Thenextrisingedge
oftheCLKsignalwillbevalidwhenisCKEHIGHandinvalidwhenLOW.WhenCKE
isLOW,thedevicewillbeineitherpower-downmode,clocksuspendmode,orself
refresh mode. CKEisan asynchronous input.
CLK
38
InputPin
CLKisthemasterclockinputforthisdevice.ExceptforCKE,allinputstothisdevice
areacquiredinsynchronizationwiththerisingedgeofthispin.
CS
19
InputPin
TheCS input determines whether command input is enabled within the device.
Command input is enabled when CSisLOW,anddisabledwithCSisHIGH.The
device remains in the previous state when CSisHIGH.
DQ0to
2,4,5,7,8,10,
DQPin
DQ0toDQ15areI/Opins.I/Othroughthesepinscanbecontrolledinbyteunits
DQ15
11,13,42,44,45,
usingtheLDQMandUDQMpins.
47,48,50,51,53
LDQM,
15,39
InputPin
LDQMandUDQMcontrolthelowerandupperbytesoftheI/Obuffers.Inread
UDQM
mode,LDQMandUDQMcontroltheoutputbuffer.WhenLDQMorUDQMisLOW,
thecorrespondingbufferbyteisenabled,andwhenHIGH,disabled.Theoutputs
gototheHIGHimpedancestatewhenLDQM/UDQMisHIGH.Thisfunctioncor-
responds to OEinconventionalDRAMs.Inwritemode,LDQMandUDQMcontrol
theinputbuffer.WhenLDQMorUDQMisLOW,thecorrespondingbufferbyteisen-
abled,anddatacanbewrittentothedevice.WhenLDQMorUDQMisHIGH,input
data is masked and cannot be written to the device.
RAS
18
InputPin
RAS
, in conjunction with CAS and WE, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
WE
16
InputPin
WE
, in conjunction with RAS and CAS, forms the device command. See the "Com-
mandTruthTable"itemfordetailsondevicecommands.
VDDq
3,9,43,49
PowerSupplyPinVDDq is the output buffer power supply.
VDD
1,14,27
PowerSupplyPinVDD is the device internal power supply.
GNDq
6,12,46,52
PowerSupplyPin GNDq is the output buffer ground.
GND
28,41,54
PowerSupplyPin GND is the device internal ground.


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