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AT91SAM9263 Datasheet(PDF) 1 Page - ATMEL Corporation |
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AT91SAM9263 Datasheet(HTML) 1 Page - ATMEL Corporation |
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1 / 51 page  NOTE: This is a summary document. The complete document is available on the Atmel website at www.atmel.com. Features • Incorporates the ARM926EJ-S™ ARM® Thumb® Processor – DSP Instruction Extensions, Jazelle® Technology for Java® Acceleration – 16 Kbyte Data Cache, 16 Kbyte Instruction Cache, Write Buffer – 220 MIPS at 200 MHz – Memory Management Unit – EmbeddedICE™, Debug Communication Channel Support – Mid-level Implementation Embedded Trace Macrocell™ • Bus Matrix – Nine 32-bit-layer Matrix, Allowing a Total of 28.8 Gbps of On-chip Bus Bandwidth – Boot Mode Select Option, Remap Command • Embedded Memories – One 128 Kbyte Internal ROM, Single-cycle Access at Maximum Bus Matrix Speed – One 80 Kbyte Internal SRAM, Single-cycle Access at Maximum Processor or Bus Matrix Speed – One 16 Kbyte Internal SRAM, Single-cycle Access at Maximum Bus Matrix Speed • Dual External Bus Interface (EBI0 and EBI1) – EBI0 Supports SDRAM, Static Memory, ECC-enabled NAND Flash and CompactFlash® – EBI1 Supports SDRAM, Static Memory and ECC-enabled NAND Flash • DMA Controller (DMAC) – Acts as one Bus Matrix Master – Embeds 2 Unidirectional Channels with Programmable Priority, Address Generation, Channel Buffering and Control • Twenty Peripheral DMA Controller Channels (PDC) • LCD Controller – Supports Passive or Active Displays – Up to 24 bits per Pixel in TFT Mode, Up to 16 bits per Pixel in STN Color Mode – Up to 16M Colors in TFT Mode, Resolution Up to 2048x2048, Supports Virtual Screen Buffers • Two D Graphics Accelerator – Line Draw, Block Transfer, Clipping, Commands Queuing • Image Sensor Interface – ITU-R BT. 601/656 External Interface, Programmable Frame Capture Rate – 12-bit Data Interface for Support of High Sensibility Sensors – SAV and EAV Synchronization, Preview Path with Scaler, YCbCr Format • USB 2.0 Full Speed (12 Mbits per second) Host Double Port – Dual On-chip Transceivers – Integrated FIFOs and Dedicated DMA Channels • USB 2.0 Full Speed (12 Mbits per second) Device Port – On-chip Transceiver, 2,432-byte Configurable Integrated DPRAM • Ethernet MAC 10/100 Base-T – Media Independent Interface or Reduced Media Independent Interface – 28-byte FIFOs and Dedicated DMA Channels for Receive and Transmit • Fully-featured System Controller, including – Reset Controller, Shutdown Controller – Twenty 32-bit Battery Backup Registers for a Total of 80 Bytes – Clock Generator and Power Management Controller – Advanced Interrupt Controller and Debug Unit – Periodic Interval Timer, Watchdog Timer and Double Real-time Timer AT91 ARM Thumb Microcontrollers AT91SAM9263 Preliminary Summary 6249HS–ATARM–27-Jul-09 |
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