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BQ24050 Datasheet(PDF) 3 Page - Texas Instruments |
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BQ24050 Datasheet(HTML) 3 Page - Texas Instruments |
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3 / 37 page  bq24050 bq24052 bq24055 www.ti.com.................................................................................................................................... SLUS940A – SEPTEMBER 2009 – REVISED SEPTEMBER 2009 RECOMMENDED OPERATING CONDITIONS (1) MIN NOM UNIT IN voltage range 3.5 28 V VIN IN operating voltage range, Restricted by VDPM and VOVP 4.45 6.45 V IIN Input current, IN pin 0.8 A IOUT Current, OUT pin 0.8 A TJ Junction temperature 0 125 °C RPRE-TERM Programs precharge and termination current thresholds 1 10 k Ω RISET Fast-charge current programming resistor 0.675 49.9 k Ω 10k NTC thermistor range without entering TTDM, bq24050/55 1.66 258 k Ω RTS 100k NTC thermistor range without entering TTDM, bq24052 24 885 k Ω (1) Operation with VIN less than 4.5V or in drop-out may result in reduced performance. ELECTRICAL CHARACTERISTICS Over junction temperature range 0°C ≤ TJ ≤ 125°C and recommended supply voltage (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT UVLO Undervoltage lock-out Exit VIN: 0V → 4V Update based on sim/char 3.15 3.3 3.45 V VIN: 4V→0V, VHYS_UVLO Hysteresis on VUVLO_RISE falling 175 230 280 mV VUVLO_FALL = VUVLO_RISE –VHYS-UVLO Input power good detection threshold (Input power good if VIN > VOUT + VIN-DT); VOUT = VIN-DT 30 80 145 mV is VOUT + VIN-DT 3.6V, VIN: 3.5V → 4V VHYS-INDT Hysteresis on VIN-DT falling VOUT = 3.6V, VIN: 4V → 3.5V 31 mV Time measured from VIN: 0V → 5V 1μs rise-time to tDGL(PG_PWR) Deglitch time on exiting sleep. 45 μs PG = low, VOUT = 3.6V tDGL(PG_NO- Deglitch time on VHYS-INDT power Time measured from VIN: 5V → 3.2V 1μs fall-time 29 ms PWR) down. Same as entering sleep. to PG = High Z, VOUT = 3.6V VOVP Input over-voltage protection threshold VIN: 5V → 7V (50/52/55) 6.5 6.65 6.8 V tDGL(OVP-SET) Input over-voltage blanking time VIN: 5V → 12V 113 μs VHYS-OVP Hysteresis on OVP VIN: 11V → 5V 95 mV Time measured from VIN: 12V → 5V 1μs fall-time tDGL(OVP-REC) Deglitch time exiting OVP 30 μs to PG = LO Feature active in USB mode; Limit Input Source 4.34 4.4 4.46 Current to 50mA; VOUT=3.5V; RISET = 825Ω USB/Adaptor low input voltage VIN-DPM V protection. Restricts lout at VIN-DPM Feature active in Adaptor mode; Limit Input Source 4.24 4.3 4.36 Current to 50mA; VOUT=3.5V; RISET = 825Ω USB input I-Limit 100mA ISET2 = Float; RISET = 825Ω 85 92 100 IIN-USB-CL mA USB input I-Limit 500mA ISET2 = High; RISET = 825Ω 430 462 500 ISET SHORT CIRCUIT TEST Highest Resistor value considered a Riset: 600 Ω → 250Ω, Iout latches off. Cycle power RISET_SHORT 280 500 Ω fault (short). Monitored for Iout>90mA to Reset. USB100 mode. Deglitch time transition from ISET tDGL_SHORT Clear fault by cycling IN or TS 1 ms short to Iout disable Maximum OUT current limit VIN = 5V, VOUT = 3.6V, VISET2 =Low, Riset: 600Ω → IOUT_CL 1.05 1.4 A Regulation (Clamp) 250 Ω, Iout latches off after tDGL-SHORT BATTERY SHORT PROTECTION OUT pin short-circuit detection VOUT(SC) VOUT:3V → 0.5V, no deglitch 0.75 0.8 0.85 V threshold/ precharge threshold Recovery ≥ VOUT(SC) + VOUT(SC-HYS); Rising, no VOUT(SC-HYS) OUT pin Short hysteresis 77 mV Deglitch Source current to OUT pin during IOUT(SC) 10 15 20 mA short-circuit detection Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): bq24050 bq24052 bq24055 |
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