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DAC8734 Datasheet(PDF) 5 Page - Texas Instruments |
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DAC8734 Datasheet(HTML) 5 Page - Texas Instruments |
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5 / 41 page  DAC8734 www.ti.com .................................................................................................................................................. SBAS465A – MAY 2009 – REVISED SEPTEMBER 2009 ELECTRICAL CHARACTERISTICS (continued) All specifications at TA = TMIN to TMAX, AVDD = +11V to +18V, AVSS = –11V to –18V, VREF = REF-A = REF-B = +5V, DVDD = +5V, IOVDD = +1.8V to DVDD, AGND = DGND = REFGND-A = REFGND-B = SGND-x = 0V, and DAC gain = 4, unless otherwise noted. DAC8734 PARAMETER CONDITIONS MIN TYP MAX UNIT DIGITAL INPUTS(13) (SDI, CS, SCLK, RST, UNI/BIP-A, UNI/BIP-B, LDAC, GPIO-x) IOVDD = 4.5V to 5.5V 2.5 IOVDD + 0.3 V High-level input voltage, VIH IOVDD = 2.7V to 3.3V 2.1 IOVDD + 0.3 V IOVDD = +1.8V 1.6 IOVDD + 0.3 V IOVDD = 4.5V to 5.5V –0.3 0.8 V Low-level input voltage, VIL IOVDD = 2.7V to 3.3V –0.3 0.6 V IOVDD = +1.8V –0.3 0.2 V Input current 1 µA Input capacitance 5 pF DIGITAL OUTPUTS(13) (SDO, GPIO-x) IOVDD = 2.7V to 5.5V, sourcing 1mA IOVDD – 0.4 V SDO high-level output voltage, VOH IOVDD = +1.8V, sourcing 200µA 1.6 V IOVDD = 2.7V to 5.5V, sinking 1mA 0.4 V SDO low-level output voltage, VOL IOVDD = +1.8V, sinking 200µA 0.2 V SDO high-impedance leakage 1 µA SDO high-impedance output 10 pF capacitance IOVDD = 2.7V to 5.5V, sinking 1mA 0 0.4 V GPIO low-level output voltage, VOL IOVDD = +1.8V, sinking 1mA 0 0.4 V GPIO open-drain high-level GPIO in Hi-Z and configured as output 1 µA output leakage current POWER SUPPLY AVDD (14) +4.75 +24 V AVSS (15) –18 –4.75 V DVDD +2.7 +5.5 V IOVDD +1.7 DVDD V AIDD (normal operation) ±10V output range, no loading current, VOUT = 0V 2.7 3.4 mA/Channel AIDD (power-down) 100 µA AISS (normal operation) ±10V output range, no loading current, VOUT = 0V 3.3 4.0 mA/Channel AISS (power-down) 100 µA Static current through the DVDD pin with VIH = IOVDD and DIDD 25 50 µA VIL = DGND IOIDD VIH = IOVDD, VIL = DGND ±1 ±10 µA Power dissipation (normal ±12V power, no loading current, VOUT = 0V 290 mW operation) TEMPERATURE RANGE Specified performance –40 +105 °C (13) Specified by design and characterization. (14) AVDD should not be greater than +24V or less than +4.75V. Also, AVDD should not be less than ( 2 × VREF + 1V) for bipolar output mode and should not be less than (Gain × VREF + 1V) for unipolar output mode. In any case, (AVDD – AVSS) ≤ +36V. (15) AVSS should not be greater than –4.75V or less than –18V. Also, AVSS should not be greater than (–2 × VREF – 1V). In any case, (AVDD – AVSS) ≤ +36V. Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): DAC8734 |
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